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ISL6520CBZ Datasheet(PDF) 5 Page - Intersil Corporation |
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ISL6520CBZ Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 11 page 5 FN9009.6 April 3, 2007 Start interval and causes an over-current trip. The converter dissipates very little power with this method. The measured input power for the conditions of Figure 1 is only 1.5W. The over-current function will trip at a peak inductor current (IPEAK) determined by: where IOCSET is the internal OCSET current source (20μA typical). The OC trip point varies mainly due to the MOSFET’s rDS(ON) variations. To avoid over-current tripping in the normal operating load range, find the ROCSET resistor from the equation above with: 1. The maximum rDS(ON) at the highest junction temperature. 2. The minimum IOCSET from the specification table. 3. Determine IPEAK for , where ΔI is the output inductor ripple current. For an equation for the ripple current, see“Output Inductor Selection” on page 7. Soft-Start The POR function initiates the soft-start sequence after the overcurrent set point has been sampled. Soft-start clamps the error amplifier output (COMP pin) and reference input (non- inverting terminal of the error amp) to the internally generated Soft-Start voltage. Figure 2 shows a typical start up interval where the COMP/OCSET pin has been released from a grounded (system shutdown) state. Initially, the COMP/OCSET is used to sample the oversurrent setpoint by disabling the error amplifier and drawing 20 μA through ROCSET. Once the over- current level has been sampled, the soft start function is initiated. The clamp on the error amplifier (COMP/OCSET pin) initially controls the converter’s output voltage during soft start. The oscillator’s triangular waveform is compared to the ramping error amplifier voltage. This generates PHASE pulses of increasing width that charge the output capacitor(s). When the internally generated Soft-Start voltage exceeds the feedback (FB pin) voltage, the output voltage is in regulation. This method provides a rapid and controlled output voltage rise. The entire startup sequence typically take about 11ms. Application Guidelines Layout Considerations As in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. The critical components should be located as close together as possible, using ground plane construction or single point grounding. Figure 3 shows the critical power components of the converter. To minimize the voltage overshoot, the interconnecting wires indicated by heavy lines should be part of a ground or power plane in a printed circuit board. The components shown in Figure 3 should be located as close together as possible. Please note that the capacitors CIN and CO may each represent numerous physical capacitors. Locate the ISL6520 within 3 inches of the MOSFETs, Q1 and Q2. The circuit traces for the MOSFETs’ gate and source connections from the ISL6520 must be sized to handle up to 1A peak current. FIGURE 1. OVERCURRENT OPERATION TIME (5ms/DIV.) OUTPUT INDUCTOR 5A/DIV. CURRENT I PEAK I OCSET x ROCSET r DS ON () ----------------------------------------------------- = (EQ. 3) I PEAK I OUT MAX () ΔI () 2 ---------- + > FIGURE 2. START UP SEQUENCE VOUT 500mV/DIV. COMP/OCSET 1V/DIV. TIME (2ms/DIV.) LO CO LGATE UGATE PHASE Q1 Q2 VIN VOUT RETURN ISL6520 CIN FIGURE 3. PRINTED CIRCUIT BOARD POWER AND GROUND PLANES OR ISLANDS ISL6520 |
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