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ISL6551 Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL6551 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 26 page 2 FN9066.5 January 3, 2006 Pinouts 28 PIN WIDE BODY (SOIC) TOP VIEW 28 PIN (QFN) TOP VIEW Ordering Information PART NUMBER TEMP RANGE (°C) PACKAGE PKG. DWG. # ISL6551IB 0 to 85 28 Ld SOIC M28.3 ISL6551IBZ (Note) 0 to 85 28 Ld SOIC (Pb-free) M28.3 ISL6551IR 0 to 85 28 Ld 6x6 QFN L28.6x6 ISL6551IRZ (Note) 0 to 85 28 Ld 6x6 QFN (Pb-free) L28.6x6 ISL6551ABZ (Note) -40 to 105 28 Ld SOIC (Pb-free) M28.3 ISL6551AR -40 to 105 28 Ld 6x6 QFN L28.6x6 ISL6551ARZ (Note) -40 to 105 28 Ld 6x6 QFN (Pb-free) L28.6x6 ISL6551EVAL1 Evaluation Platform (ISL6551IR only) Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Ordering Information (Continued) PART NUMBER TEMP RANGE (°C) PACKAGE PKG. DWG. # VSS CT RD R_RESDLY R_RA ISENSE PKILIM BGREF R_LEB CS_COMP CSS EANI EAI EAO VDD VDDP2 PGND UPPER1 UPPER2 LOWER2 SYNC2 ON/OFF DCOK LATSD SHARE VDDP1 LOWER1 SYNC1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 R_RESDLY R_RA ISENSE PKILIM BGREF R_LEB CS_COMP UPPER1 UPPER2 LOWER1 LOWER2 SYNC1 SYNC2 ON/OFF 1 2 3 4 5 6 7 21 20 19 18 17 16 15 28 27 26 25 24 23 22 8 9 10 11 12 13 14 ISL6551 |
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