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X40430S14-A Datasheet(PDF) 7 Page - Intersil Corporation |
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X40430S14-A Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 26 page  7 FN8251.1 May 24, 2006 PRINCIPLES OF OPERATION Power-on Reset Applying power to the X40430, X40431, X40434, X40435 activates a Power-on Reset Circuit that pulls the RESET/RESET pins active. This signal provides several benefits. – It prevents the system microprocessor from starting to operate with insufficient voltage. – It prevents the processor from operating prior to sta- bilization of the oscillator. – It allows time for an FPGA to download its configura- tion prior to initialization of the circuit. – It prevents communication to the EEPROM, greatly reducing the likelihood of data corruption on power-up. When VCC exceeds the device VTRIP1 threshold value for tPURST (selectable) the circuit releases the RESET (X40431, X40435) and RESET (X40430, X40434) pin allowing the system to begin operation. Figure 1. Connecting a Manual Reset Push-Button Manual Reset By connecting a push-button directly from MR to ground, the designer adds manual system reset capability. The MR pin is LOW while the push-button is closed and RESET/RESET pin remains HIGH/LOW until the push- button is released and for tPURST thereafter. Low Voltage VCC (V1 Monitoring) During operation, the X40430, X40431, X40434, X40435 monitors the VCC level and asserts RESET/RESET if supply voltage falls below a preset minimum VTRIP1. The RESET/RESET signal prevents the microprocessor from operating in a power fail or brownout condition. The RESET/RESET signal remains active until the voltage drops below 1V. It also remains active until VCC returns and exceeds VTRIP1 for tPURST. Low Voltage V2 Monitoring The X40430 also monitors a second voltage level and asserts V2FAIL if the voltage falls below a preset mini- mum VTRIP2. The V2FAIL signal is either ORed with RESET to prevent the microprocessor from operating in a power fail or brownout condition or used to inter- rupt the microprocessor with notification of an impend- ing power failure. For the X40430 and X40431 the V2FAIL signal remains active until the V2MON drops below 1V (V2MON falling). It also remains active until V2MON returns and exceeds VTRIP2. This voltage sense cir- cuitry monitors the power supply connected to V2MON pin. If VCC = 0, V2MON can still be monitored. For the X40434 and X40435, the V2FAIL signal remains active until VCC drops below 1V and remains active until V2MON returns and exceeds VTRIP2. This sense circuitry is powered by VCC. If VCC = 0, V2MON cannot be monitored. Low Voltage V3 Monitoring The X40430, X40431, X40434, X40435 also monitors a third voltage level and asserts V3FAIL if the voltage falls below a preset minimum VTRIP3. The V3FAIL sig- nal is either ORed with RESET to prevent the micro- processor from operating in a power fail or brownout condition or used to interrupt the microprocessor with notification of an impending power failure. The V3FAIL signal remains active until the V3MON drops below 1V (V3MON falling). It also remains active until V3MON returns and exceeds VTRIP3. This voltage sense circuitry monitors the power supply connected to V3MON pin. If VCC = 0, V3MON can still be monitored. Early Low VCC Detection (LOWLINE) This CMOS output goes LOW earlier than RESET/RESET whenever VCC falls below the VTRIP1 voltage and returns high when VCC exceeds the VTRIP1 voltage. There is no power-up delay circuitry (tPURST) on this pin. VCC MR System Reset Manual Reset X40430, X40434 RESET X40430, X40431, X40434, X40435 |
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