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FMS6407 Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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FMS6407 Datasheet(HTML) 9 Page - Fairchild Semiconductor |
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9 / 17 page  REV. 1I July 2005 9 FMS6407 DATA SHEET Filter Settings FSEL1, Pin 10 FSEL0, Pin 9 Filter -3dB Freq Video Format Sync Format 0 0 8.2MHz SD, 480i Bi-level, 4.7µs pulse width 01 15MHz PS, 480p Bi-level, 2.35µs pulse width 1 0 32MHz HD, 1080i, 720p Tri-level, 589ns pulse width 11 Filter Bypass – Bi-level, 2.35µs pulse width I/O and Clamp Settings RGB, Pin 17 CV_SEL, Pin 2 Input Output Clamp Voltage 0 X (don’t care) Y, Pin 3 Y, Pin 16 250mV Pb, Pin 5 Pb, Pin 15 1.125V Pr, Pin 7 Pr, Pin 14 1.125V 1 0 G/Y, Pin 4 G, Pin 16 250mV B/C, Pin 6 B, Pin 15 250mV R/CV, Pin 8 R, Pin 14 250mV 1 1 Y/G, Pin 4 Y, Pin 16 250mV C/B, Pin 6 C, Pin 15 1.125V CV/R, Pin 8 CV, Pin 14 250mV * Video level, does not include clamp voltage which will offset the input above ground. Gain Settings 0dB, Pin 13 Gain (dB) VIN*VOUT* 0 6 1Vpp 2Vpp 10 1Vpp 1Vpp Sync Settings EXT_SYNC, Pin1 Sync Source 0 Y/G input, Pin 3/4 1 SYNC_IN input, Pin 2 |
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Similar Description - FMS6407 |
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