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FMS7401LEMT8X Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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FMS7401LEMT8X Datasheet(HTML) 9 Page - Fairchild Semiconductor |
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9 / 81 page  PRODUCT SPECIFICATION FMS7401L REV. 1.0.3 1/24/05 9 The BOR circuit should be used in situations when Vcc rises and falls slowly and in situations when Vcc does not fall to 0V before rising back to the device’s normal operating range. The BOR circuit can be thought of as a supplement function to the POR circuit if Vcc does not fall below 0.7V. Figure 2. BOR and POR Circuit Relationship Diagram 1. Available only on the 14-pin package option. 2. Refer to the Timer 0 Circuit section of the datasheet for details regarding the Watchdog Reset. 3. Refer to Table 30 of the Device Memory section of the datasheet for the detailed memory map. 4. Refer to the Device Memory section of the datasheet for details regarding the Initialization Register 1. 5. Refer to Table 28 and Table 29 of the Device Memory section of the datasheet for details. Vcc (Pin 8) BOR Reset Circuit Output Global Reset to Logic External Reset Pin (14-Pin Only) B A output POR (Pin 7) output VCC Time BOR Output 1.75 0 VCC VCC 0 POR output POR Output Pulse 3.0V 0 VCC 3.0V 0 The Reset circuit will trigger when inputs A or B transition fro m High to Low. At that time the Global Reset signal will go high which will reset all controller logic. The Global Reset will go high and stay high for around 1µs. VCC |
Similar Part No. - FMS7401LEMT8X |
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Similar Description - FMS7401LEMT8X |
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