7

FN9124.8

April 16, 2007

CURRENT SENSE

Input Bias Current

-1.0

-

1.0

μA

CS Offset Voltage

95

100

105

mV

COMP to PWM Comparator Offset Voltage

0.80

1.15

1.30

V

Input Signal, Maximum

0.91

0.97

1.03

V

(Note 6)

2.5

3.0

3.5

V/V

CS to OUT Delay

(Note 6)

-

25

40

ns

ERROR AMPLIFIER

Open Loop Voltage Gain

(Note 6)

60

90

-

dB

Unity Gain Bandwidth

(Note 6)

3.5

5

-

MHz

Reference Voltage

2.475

2.514

2.55

V

FB Input Bias Current

-1.0

-0.2

1.0

μA

COMP Sink Current

1.0

-

-

mA

COMP Source Current

-0.4

-

-

mA

COMP VOH

4.80

-

VREF

V

COMP VOL

0.4

-

1.0

V

PSRR

18V (Note 6)

60

80

-

dB

OSCILLATOR

Frequency Accuracy

49

52

55

kHz

-0.2

1.0

%

Temperature Stability

(Note 6)

-

-

5

%

Amplitude, Peak to Peak

-

1.9

-

V

RTCT Discharge Voltage

-

0.7

-

V

Discharge Current

RTCT = 2.0V

7.2

8.4

9.5

mA

OUTPUT

Gate VOH

-

1.0

2.0

V

Gate VOL

-

1.0

2.0

V

Peak Output Current

-

1.0

-

A

Rise Time

-

20

40

ns

Fall Time

-

20

40

ns

PWM

Maximum Duty Cycle

ISL6840, ISL6842, ISL6843

94

96

-

%

ISL6841, ISL6844, ISL6845

47

48

-

%

Minimum Duty Cycle

ISL6840, ISL6842, ISL6843

-

-

0

%

ISL6841, ISL6844, ISL6845

-

-

0

%

NOTES:

4. Specifications at -40°C although guaranteed, are not 100% tested in production.

6. These parameters, although guaranteed, are not 100% tested in production.

Electrical Specifications

Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

ISL6840, ISL6841, ISL6842, ISL6843, ISL6844, ISL6845