Electronic Components Datasheet Search |
|
CDCD5704 Datasheet(PDF) 9 Page - Texas Instruments |
|
|
CDCD5704 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 19 page www.ti.com RECOMMENDED AC OPERATING CONDITIONS DEVICE CHARACTERISTICS CDCD5704 SCAS823 – DECEMBER 2006 MIN NOM MAX UNIT tCYCLE,IN REFCLK/REFCLKB input cycle time 7 11 ns tCYC,TEST REFCLK/REFCLKB input cycle time for BYPASS 4 40 ns tJ,IN Input |cycle-to-cycle| jitter(1) 185 ps DCIN Input duty cycle over 10,000 cycles(2) 40% 60% tr/tf Rise and fall time for REFCLK signal from 20% to 80% of input voltage VIN 175 700 ps tcr/tcf Difference between rise time and fall time of REFCLK signal from 20% to 80% 150 ps fm,IN SSC frequency modulation repeat frequency(3) 30 33 kHz Pm tria Modulation index (= frequency deviation/center frequency) for triangle modulation(3) 0.6% Pm n tria Modulation index (= frequency deviation/center frequency) for non-triangle modulation(4) 0.5% tSR Input slew rate REFCLK/REFCLKB 1 4 V/ns SERIAL INTERFACE TIMING fSCLK SCLK frequency(5) 0 100 kHz th(START) START hold time(5) 4 µs tw(SCLL) SCLK low-pulse duration(5) 4.7 µs tw(SCLH) SCLK high-pulse duration(5) 4 µs tsu(START) START setup time(5) 4.7 µs th(SDATA) SDATA hold time(5) 300 ps tsu(SDATA) SDATA setup time(5) 250 ps tr(SDATA)/ SDATA/SCLK input rise time(5) 1000 ns tr(SM) tf(SDATA)/ SDATA/SCLK input fall time(5) 300 ns tf(SM) tsu(STOP) STOP setup time(5) 4 µs t(BUS) Bus free time 4.7 µs (1) RefCLK jitter is measured at (VIH(nom) – VIL(nom))/2 and is the absolute value of the worst-case deviation. (2) Measured at crossing points for differential clock input or at input threshold voltage VTH for single-ended clock input. (3) If input modulation is used; input modulation is allowed but not required. (4) The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew, which cannot exceed the skew generated by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about 0.5%. (5) See Figure 1 for the timing behavior of the serial interface. over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OVERALL PARAMETER At 300 MHz and 2.625 V 70 85 IDD Supply current (= IVDD + IVDDP + IVDDC) mA At 667 MHz and 2.625 V 90 115 Supply voltage threshold for power-up control Over complete supply voltage VPUC 1.1 1.8 2.2 V circuit range DC DEVICE CHARACTERISTICS VOX Differential output crossing-point voltage(1) Output load; see Figure 3. 0.9 1 1.1 V VCOS Output voltage swing (p-p, single-ended)(2) 0.3 0.325 0.35 V VOL,ABS Absolute output low voltage(3) 0.85 V Reference voltage for swing control current VDD = 2.375 V to 2.625 V, T = 0°C VISET 0.98 1 1.02 V IREF(4) to 70 °C (1) VOX is measured on external divider as shown in Figure 3. (2) VCOS = (clock output high voltage – clock output low voltage), at the measurement points shown in Figure 3, excluding overshoot and undershoot. (3) VOL,ABS is measured at the clock output of the package, instead of the measurement points of Figure 3. (4) IREF is equal to VISET/RRC. Tolerance of RRC must be ±1% or smaller. 9 Submit Documentation Feedback |
Similar Part No. - CDCD5704 |
|
Similar Description - CDCD5704 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |