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FSUSB31L8X Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FSUSB31L8X Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 15 page © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FSUSB31 Rev. 1.0.6 8 Test Diagrams (Continued) Figure 13. Break-Before-Make (tBBM) Figure 14. Switch Skew Tests Figure 15. Bandwidth tD tR = tF = 2.5ns (10–90%) RL S CL* HSDn HSDn VO Control Input D+, D– GND Control Input 50% VCC 0V VOUT VOUT VCC VCC 0.9 x VOUT *CL includes test fixture and stray capacitance. tRISE = 500ps tPLH tPHL nput: Output: D+, D– HSDn+ HSDn– tFALL = 500ps VOH 90% 90% 50% 50% 10% 10% 50% 50% VOL 800mV TSK(P) = | tPHL – tPLH | Pulse Skew, TSK(P) 400mV tRISE = 500ps tPLH1 tPHL1 Output1: Input: D+, D– Output1: D2+, D2– HSD1+ HSD1– tFALL = 500ps VOH 90% 90% 50% 50% 10% 10% 50% 50% VOL 800mV TSK(O) = | tPLH1 – tPLH2 | or | tPHL1 – tPHL2 | Output Skew, TSK(OUT) 400mV tPLH2 tPHL2 VOH 50% 50% VOL RS VIN FSUSB31 GND VOE Network Analyzer VOUT GND VS GND RT GND GND RS and RT are functions of the application environment (see AC Electrical Tables for specific values). |
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