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MM74HC163 Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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MM74HC163 Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 9 page 5 www.fairchildsemi.com AC Electrical Characteristics (Continued) Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC 2 f + I CC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Logic Waveforms Synchronous Binary Counters Typical Clear, Preset, Count and Inhibit Sequences Sequence: (1) Clear outputs to zero (2) Preset to binary twelve (3) Count to thirteen, fourteen, fifteen, zero, one and two (4) Inhibit Symbol Parameter Conditions VCC TA = 25°CTA = −40 to 85°CTA = −55 to 125°C Units Typ Guaranteed Limits tS Minimum Setup 2.0V 175 220 260 ns Time Enable 4.5V 35 44 52 to Clock 6.0V 30 37 44 tH Minimum Hold Time 2.0V 50 63 75 ns Data from Clock 4.5V 10 13 15 6.0V 9 11 13 tH Minimum Hold Time 2.0V 0 0 0 ns Enable, Load or Clear 4.5V 0 0 0 to Clock 6.0V 0 0 0 tW Minimum Pulse Width 2.0V 80 100 120 ns Clock, Clear, or 4.5V 16 20 24 Load 6.0V 14 17 20 tTLH, tTHL Maximum 2.0V 40 75 95 110 ns Output Rise and 4.5V 8 15 19 22 Fall Time 6.0V 7 13 16 19 tr, tf Maximum Input Rise 2.0V 1000 1000 1000 ns and Fall Time 4.5V 500 500 500 500 6.0V 400 400 400 CPD Powert Dissipation (per package) 90 pF Capacitance (Note 6) CIN Maximum Input Capacitance 5 10 10 10 pF |
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