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PCA84C822AT Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCA84C822AT Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 24 page  1995 May 01 11 Philips Semiconductors Product specification 8-bit microcontrollers for remote control transmitters PCA84C122; 222; 422; 622; 822 8.3 Operation of the Hardware Modulator First the ON-time and OFF-time registers are loaded. The number of pulses to be generated is stored in the Pulse Counter. The Hardware Modulator starts as soon as the Pulse Counter is loaded. First the signal OUT is activated and the ON-time value is stored in the Pulse Timer. Then the Pulse Timer is counted down with pulses of 1/fosc. When the Pulse Timer reaches zero the OUT signal becomes inactive and the value held in the Pulse Counter is decreased by ‘1’. If the Pulse Counter is not yet zero, the OFF-time is stored in the Pulse Timer and is counted down again. When it reaches zero now, signal OUT is activated again, ON-time is loaded and the counter starts counting down etc. On the Pulse Counter reaching zero, an interrupt (Special Interrupt, SI) is sent to the CPU, indicating that the Hardware Modulator is ready. The delay between two pulse bursts is determined by software. When a new burst must be generated with the same ON-time and OFF-time values, only the Pulse Counter is loaded with the required number of pulses and the Hardware Modulator will start automatically. The interrupt signal is reset when the Pulse Counter is loaded or can be reset directly by writing a logic 1 to bit Rint of the Control Register. 9 INTERRUPTS There are three different interrupt sources with different vectors within the PCA84C122, these are: • External keypad wake-up and T0/INT pin; vector address: 03H • Hardware modulator (SI); vector address: 05H • Internal Timer/counter (TI); vector address: 07H. 9.1 Internal timer/counter The internal timer/counter is the same as in the other members of the PCF84CXXX family. Instructions ‘EN TCNTI’ and ‘DIS TCNTI’ are to enable/disable the interrupt. 9.2 External keypad wake-up and T0/INT pin 9.2.1 KEYPAD WAKE-UP The keypad wake-up function generates an interrupt signal to the CPU. This signal is used to terminate the Stop mode and thus allows program execution to continue. If the external interrupt is enabled the microcontroller executes the instruction immediately following the STOP instruction, before executing the interrupt routine. If the external interrupt is disabled, program execution continues with the instruction following the STOP instruction. The wake-up function is activated when any of the sense lines (Port 1 pins) are pulled LOW. 9.2.2 T0/INT PIN T0/INT must be connected to VDD when not in use, because no internal pull-up or pull-down is present (floating input). Because this pin is ‘ANDed’ with Port 1 inputs, the result of ‘JTO’ and ‘JNTO’ instructions and the interrupt depends on the AND of all Port 1 and T0/INT inputs. T0/INT can serve as an extra sense line, when a pull-up resistor is connected, however, multiple keys will not be detected. 10 OUTPUT DRIVER The output of the Hardware Modulator is amplified and able to sink a current of 27 mA when the OUT signal is active. Therefore, only one external (PNP) transistor is required to drive the IR-LED. LOW level output sink current, minimum 27 mA at VDD = 2.0 V, VOUT < VDD − 1.0 V. 11 WATCHDOG TIMER (WDT) The Watchdog timer consists of a 17 stage counter with a clock of 1 ⁄30 × fosc. A logic 1 written to RWDT bit (Control Register) clears the WDT to zero. After a Power-on-reset, the WDT is cleared to zero; the content of the WDT is then incremented by ‘1’ every 30 clock cycles. If the WDT is not reset to zero before it overflows, a RESET signal is generated and the device is reset, thus preventing a lock up or malfunction. The software must clear the WDT at least 1/fosc × 30 × 216 seconds before it generates the RESET signal; i.e. at fosc = 1 MHz, this is 1.92 s. In the Idle mode the oscillator is still running and therefore the WDT remains active. In the Stop mode, the WDT is fully stopped and the value of the counter is kept. |
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