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PCK2021DL Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCK2021DL Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 15 page Philips Semiconductors Product data PCK2021 CK00 (100/133 MHz) spread spectrum differential system clock generator 2001 Oct 11 11 AC WAVEFORMS VM = 1.25 V @ VDDL and 1.5 V @ VDD3 VX = VOL + 0.3 V VY = VOH – 0.3 V VOL and VOH are the typical output voltage drop that occur with the output load. 50% HOST CLK VOH VSS SW00962 50% tPERIOD Figure 1. HOST CLOCK VDDL VOH = 2.4 V VIH = 2.0 V 1.5 V VIL = 0.7 V VOL = 0.4 V VSS SYSTEM MEASUREMENT POINTS COMPONENT MEASUREMENT POINTS SW00668 Figure 2. 3.3 V clock waveforms tPLZ tPZL VI SEL1, SEL0 GND VDD OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH VSS outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SW00662 Figure 3. State enable and disable times PULSE GENERATOR RT VI DUT VO CL VDD TEST S1 tPLH/tPHL Open tPLZ/tPZL 2 VDD tPHZ/tPZH VSS Open VSS S1 2 VDD VDD = VDD3 500 Ω 500 Ω SW00963 Figure 4. Load circuitry for switching times |
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