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TVP9900PFP Datasheet(PDF) 3 Page - Texas Instruments |
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TVP9900PFP Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 65 page  www.ti.com TVP9900 VSB/QAM Receiver SLEA064 – MARCH 2007 6.2.19 Timing Recovery Status Register 1 ........................................................................... 34 6.2.20 Timing Recovery Status Register 2 ........................................................................... 34 6.2.21 Timing Recovery Status Register 3 ........................................................................... 35 6.2.22 Timing Recovery Status Register 4 ........................................................................... 35 6.2.23 Timing Recovery Status Register 5 ........................................................................... 35 6.2.24 Timing Recovery Status Register 6 ........................................................................... 35 6.2.25 Pilot Tracking Status Register 1 ............................................................................... 36 6.2.26 Pilot Tracking Status Register 2 ............................................................................... 36 6.2.27 Pilot Tracking Status Register 3 ............................................................................... 36 6.2.28 Carrier Recovery Status Register 1 ........................................................................... 36 6.2.29 Carrier Recovery Status Register 2 ........................................................................... 37 6.2.30 Carrier Recovery Status Register 3 ........................................................................... 37 6.2.31 Carrier Recovery Status Register 4 ........................................................................... 37 6.2.32 Carrier Recovery Status Register 5 ........................................................................... 37 6.2.33 Carrier Recovery Status Register 6 ........................................................................... 38 6.2.34 FEC Status Register 1 .......................................................................................... 38 6.2.35 FEC Status Register 2 .......................................................................................... 39 6.2.36 FEC Status Register 3 .......................................................................................... 39 6.2.37 FEC Status Register 4 .......................................................................................... 39 6.2.38 GPIO Alternate Function Select Register .................................................................... 40 6.2.39 GPIO Output Data Register .................................................................................... 40 6.2.40 GPIO Output Enable Register ................................................................................. 41 6.2.41 GPIO Input Data Register ...................................................................................... 41 6.2.42 MPEG Interface Output Enable Register 1 .................................................................. 42 6.2.43 MPEG Interface Output Enable Register 2 .................................................................. 43 6.2.44 Tuner Control Interface – I2C Slave Device Address Register ............................................ 43 6.2.45 Tuner Control Interface – Data Register 1 Through 8 ...................................................... 43 6.2.46 Tuner Control Interface – Control and Status Register ..................................................... 44 6.2.47 Antenna Control Interface – Control and Status Register .................................................. 44 6.2.48 Antenna Control Interface – Transmit Data Register 1 ..................................................... 45 6.2.49 Antenna Control Interface – Transmit Data Register 2 ..................................................... 45 6.2.50 Antenna Control Interface – Receive Data Register 1 ...................................................... 45 6.2.51 Antenna Control Interface – Receive Data Register 2 ...................................................... 46 6.2.52 Firmware ID – ROM Version Register ........................................................................ 46 6.2.53 Firmware ID – RAM Major Version Register ................................................................. 46 6.2.54 Firmware ID – RAM Minor Version Register ................................................................. 46 6.2.55 Device ID LSB Register ........................................................................................ 47 6.2.56 Device ID MSB Register ........................................................................................ 47 6.2.57 Miscellaneous Control Register ................................................................................ 47 6.2.58 Software Interrupt Raw Status Register ...................................................................... 48 6.2.59 Software Interrupt Status Register ............................................................................ 48 6.2.60 Software Interrupt Mask Register ............................................................................. 49 6.2.61 Software Interrupt Clear Register ............................................................................. 50 7 Electrical Specifications ...................................................................................................... 51 7.1 Absolute Maximum Ratings ............................................................................................... 51 7.2 Recommended Operating Conditions ................................................................................... 52 7.3 DC Electrical Characteristics ............................................................................................. 52 7.4 Analog Input Characteristics .............................................................................................. 53 7.5 Timing Characteristics ..................................................................................................... 54 7.5.1 Crystal and Input Clock ......................................................................................... 54 7.5.2 Device Reset ..................................................................................................... 54 7.5.3 MPEG Interface .................................................................................................. 55 7.5.3.1 Parallel Mode (Data Only) ...................................................................................... 55 Contents 3 |
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