3D7424

MONOLITHIC QUAD 4-BIT

PROGRAMMABLE DELAY LINE

(SERIES 3D7424)

FEATURES

•

Four indep’t programmable lines on a single chip

•

All-silicon CMOS technology

•

Low quiescent current (5mA typical)

•

Leading- and trailing-edge accuracy

•

Vapor phase, IR and wave solderable

•

Increment range: 0.75ns through 400ns

•

Delay tolerance: 3% or 2ns (see Table 1)

•

Line-to-line matching: 1% or 1ns typical

•

Temperature stability:

±1.5% typical (-40C to 85C)

•

Vdd stability:

±0.5% typical (4.75V to 5.25V)

•

Minimum input pulse width: 10% of total delay

FUNCTIONAL DESCRIPTION

The 3D7424 device is a small, versatile, quad 4-bit programmable

monolithic delay line. Delay values, programmed via the serial interface,

can be independently varied over 15 equal steps. The step size (in ns) is

determined by the device dash number. Each input is reproduced at the

corresponding output without inversion, shifted in time as per user

selection. For each line, the delay time is given by:

and TI is the delay increment (dash number). The desired addresses are

shifted into the device via the SC and SI inputs, and the addresses are latched using the AL input. The

serial interface can also be used to enable/disable each delay line. The 3D7424 operates at 5 volts and

has a typical T0 of 6ns. The 3D7424 is TTL/CMOS-compatible, capable of sourcing or sinking 4mA loads,

and features both rising- and falling-edge accuracy. The device is offered in a standard 14-pin auto-

insertable DIP and a space saving surface mount 14-pin SOIC.

PACKAGES

14

13

12

11

10

9

8

1

2

3

4

5

6

7

I1

SC

I2

I3

I4

SI

GND

VDD

AL

O1

SO

O2

O3

O4

DIP-14

3D7424-xx

1

2

3

4

5

6

7

14

13

12

11

10

9

8

I1

SC

I2

I3

I4

SI

GND

VDD

AL

O1

SO

O2

O3

O4

SOIC-14

3D7424D-xx

PIN DESCRIPTIONS

I1-I4

Signal Inputs

O1-O4 Signal Outputs

AL

Address Latch In

SC

Serial Clock In

SI

Serial Data In

SO

Serial Data Out

VDD

5.0V

GND

Ground

For mechanical dimensions, click

here.

For package marking details, click

here.

TABLE 1: PART NUMBER SPECIFICATIONS

DELAYS & TOLERANCES (NS)

INPUT RESTRICTIONS

Max Frequency

Min Pulse Width

Part

Number

Delay

Step

Inherent

Delay

Total

Delay

Relative

Tolerance

Recom’d

Absolute

Recom’d

Absolute

3D7424-.75

.75

± 0.19

6.0

± 2.0 17.25 ± 2.0 3% or 0.50ns

19 MHz

166 MHz

26 ns

3.0 ns

3D7424-1

1.0

± 0.25

6.0

± 2.0

21.0

± 2.0 3% or 0.50ns

16 MHz

166 MHz

32 ns

3.0 ns

3D7424-1.5

1.5

± 0.38

6.0

± 2.0

28.5

± 2.0 3% or 0.50ns

12 MHz

111 MHz

43 ns

4.5 ns

3D7424-2

2.0

± 0.50

6.0

± 2.0

36.0

± 2.0 3% or 0.75ns

9.2 MHz

83 MHz

54 ns

6.0 ns

3D7424-4

4.0

± 1.00

6.0

± 2.0

66.0

± 2.0 3% or 0.75ns

5.0 MHz

83 MHz

99 ns

6.0 ns

3D7424-5

5.0

± 1.25

6.0

± 2.0

81.0

± 2.5 3% or 0.75ns

4.1 MHz

66 MHz

122 ns

7.5 ns

3D7424-10

10

± 2.50

6.0

± 2.0

156

± 5.0 3% or 1.25ns

2.1 MHz

33 MHz

234 ns

15.0 ns

3D7424-15

15

± 3.75

6.0

± 2.0

231

± 7.5 3% or 1.88ns

1.4 MHz

22 MHz

347 ns

22.5 ns

3D7424-20

20

± 5.00

6.0

± 2.0

306

± 10 3% or 2.50ns

1.0 MHz

16 MHz

459 ns

30.0 ns

3D7424-40

40

± 10.0

6.0

± 2.0

606

± 20 3% or 5.00ns

550 KHz

8.3 MHz

909 ns

60.0 ns

3D7424-50

50

± 10.0

6.0

± 2.0

756

± 25 3% or 6.25ns

440 KHz

6.6 MHz

1.2 us

75.0 ns

3D7424-100

100

± 12.5

6.0

± 2.0

1506

± 50 3% or 12.5ns

220 KHz

3.3 MHz

2.3 us

150 ns

3D7424-200

200

± 20.0

6.0

± 2.0 3006 ± 100 3% or 25.0ns

110 KHz

1.6 MHz

4.5 us

300 ns

3D7424-400

400

± 40.0

6.0

± 2.0 6006 ± 200 3% or 50.0ns

55 KHz

833 KHz

9.0 us

600 ns

NOTE: Any increment between 0.75ns and 400ns not shown is also available as standard

See page 4 for details regarding input restrictions

2006 Data Delay Devices

Doc #06019

DATA DELAY DEVICES, INC.

1

6/5/2006

3 Mt. Prospect Ave. Clifton, NJ 07013