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MCZ33889DEGR2 Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MCZ33889DEGR2 Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
5 / 60 page Analog Integrated Circuit Device Data Freescale Semiconductor 5 33889 PIN CONNECTIONS 25 MISO Output Master In/Slave Out SPI data sent to the MCU by the 33889. When CSLOW is HIGH, the pin is in the high impedance state. 26 MOSI Input Master Out/Slave In SPI data received by the 33889. 27 CS Input Chip Select The CSLOW input pin is used with the SPI bus to select the 33889. When the CSLOW is asserted LOW, the 33889 is the selected device of the SPI bus. 28 WDOG Output Watchdog The WDOG output pin is asserted LOW if the software watchdog is not correctly triggered. Table 2. Pin Definitions (continued) A functional description of each pin can be found in the Functional pin description section page 24. Pin Pin Name Pin Function Formal Name Definition |
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