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PDTC114YU Datasheet(PDF) 2 Page - NXP Semiconductors |
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PDTC114YU Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 8 page 1999 Apr 20 2 Philips Semiconductors Product specification NPN resistor-equipped transistor PDTC114YU FEATURES • Built-in bias resistors R1 and R2 (typ. 10 k Ω and 47 kΩ respectively) • Simplification of circuit design • Reduces number of components and board space. APPLICATIONS • Especially suitable for space reduction in interface and driver circuits • Inverter circuit configurations without use of external resistors. DESCRIPTION NPN resistor-equipped transistor in an SC-70 (SOT323) plastic package. PINNING PIN DESCRIPTION 1 base/input 2 emitter/ground 3 collector/output Fig.1 Simplified outline (SC-70; SOT323) and symbol. handbook, 4 columns MAM134 R1 R2 3 2 1 3 2 1 Top view Fig.2 Equivalent inverter symbol. MGA893 - 1 1 3 2 MARKING Note 1. ∗ = -: Made in Hong Kong. ∗ = t: Made in Malaysia. TYPE NUMBER MARKING CODE(1) PDTC114YU ∗30 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Note 1. Refer to SC-70 (SOT323) standard mounting conditions. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCBO collector-base voltage open emitter − 50 V VCEO collector-emitter voltage open base − 50 V VEBO emitter-base voltage open collector − 10 V VI input voltage positive − 40 V negative −−6V IO output current (DC) − 100 mA ICM peak collector current − 100 mA Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 200 mW Tstg storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb operating ambient temperature −65 +150 °C |
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