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UCC2817ADG4 Datasheet(PDF) 10 Page - Texas Instruments |
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UCC2817ADG4 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 33 page UCC2817A, UCC2818A UCC3817A, UCC3818A SLUS577B − SEPTEMBER, 2003 − REVISED FEBRUARY 2006 10 www.ti.com APPLICATION INFORMATION Power switch selection: As in any power supply design, tradeoffs between performance, cost and size have to be made. When selecting a power switch, it can be useful to calculate the total power dissipation in the switch for several different devices at the switching frequencies being considered for the converter. Total power dissipation in the switch is the sum of switching loss and conduction loss. Switching losses are the combination of the gate charge loss, COSS loss and turnon and turnoff losses: P GATE + QGATE V GATE f S P COSS + 1 2 C OSS V2 OFF f S P ON ) POFF + 1 2 V OFF I L t ON ) tOFF f S where QGATE is the total gate charge, VGATE is the gate drive voltage, fS is the clock frequency, COSS is the drain source capacitance of the MOSFET, IL is the peak inductor current, tON and tOFF are the switching times (estimated using device parameters RGATE, QGD and VTH) and VOFF is the voltage across the switch during the off time, in this case VOFF = VOUT. Conduction loss is calculated as the product of the RDS(on) of the switch (at the worst case junction temperature) and the square of RMS current: P COND + RDS(on) K I2 RMS where K is the temperature factor found in the manufacturer’s RDS(on) vs. junction temperature curves. Calculating these losses and plotting against frequency gives a curve that enables the designer to determine either which manufacturer’s device has the best performance at the desired switching frequency, or which switching frequency has the least total loss for a particular power switch. For this design example an IRFP450 HEXFET from International Rectifier was chosen because of its low RDS(on) and its VDSS rating. The IRFP450’s RDS(on) of 0.4 Ω and the maximum VDSS of 500 V made it an ideal choice. An excellent review of this procedure can be found in the Unitrode Power Supply Design Seminar SEM1200, Topic 6, Design Review: 140 W, [Multiple Output High Density DC/DC Converter]. Softstart The softstart circuitry is used to prevent overshoot of the output voltage during start up. This is accomplished by bringing up the voltage amplifier’s output (VVAOUT) slowly which allows for the PWM duty cycle to increase slowly. Please use the following equation to select a capacitor for the softstart pin. In this example tDELAY is equal to 7.5 ms, which would yield a CSS of 10 nF. C SS + 10 mA t DELAY 7.5 V In an open-loop test circuit, shorting the softstart pin to ground does not ensure 0% duty cycle. This is due to the current amplifiers input offset voltage, which could force the current amplifier output high or low depending on the polarity of the offset voltage. However, in the typical application there is sufficient amount of inrush and bias current to overcome the current amplifier’s offset voltage. (4) (5) (6) (7) (8) |
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