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MH16S72APHB-6 Datasheet(PDF) 1 Page - Mitsubishi Electric Semiconductor |
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MH16S72APHB-6 Datasheet(HTML) 1 Page - Mitsubishi Electric Semiconductor |
1 / 55 page MH16S72APHB -6,-7,-8 1,207,959,552-BIT (16,777,216 - WORD BY 72-BIT)Synchronous DRAM MITSUBISHI LSIs ( / 55 ) MITSUBISHI ELECTRIC 17.Mar.2000 Preliminary Spec. Some contents are subject to change without notice. MIT-DS-0378-0.1 DESCRIPTION The MH16S72APHB is 16777216 - word by 72-bit Synchronous DRAM module. This consists of nine industry standard 16Mx8 Synchronous DRAMs in TSOP and one industory standard EEPROM in TSSOP. The mounting of TSOP on a card edge Dual Inline package provides any application where high densities and large quantities of memory are required. This is a socket type - memory modules, suitable for easy interchange or addition of modules. FEATURES Max. Clock frequency -6:133MHz,-7,8:100MHz single 3.3V±0.3V power supply Fully synchronous operation referenced to clock rising edge Burst length- 1/2/4/8/Full Page(programmable) 4 bank operation controlled by BA0,1(Bank Address) /CAS latency- 2/3(programmable) APPLICATION PC main memory Auto precharge / All bank precharge controlled by A10 Burst type- sequential / interleave(programmable) Column access - random LVTTL Interface Auto refresh and Self refresh 4096 refresh cycle /64ms 1pin 10pin 11pin 40pin 41pin 84pin 85pin 94pin 95pin 124pin 125pin 168pin 1 Utilizes industry standard 16M x 8 Sy nchronous DRAMs TSOP and industry standard EEPROM in TSSOP 168-pin (84-pin dual in-line package) Discrete IC and module design conform to PC100/PC133 specification. Frequency CLK Access Time -8 100MHz 6.0ns(CL=2) (Component SDRAM) 6.0ns(CL=3) 100MHz -7 133MHz 5.4ns(CL=3) -6 |
Similar Part No. - MH16S72APHB-6 |
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Similar Description - MH16S72APHB-6 |
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