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AD8118-EVAL Datasheet(PDF) 1 Page - Analog Devices |
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AD8118-EVAL Datasheet(HTML) 1 Page - Analog Devices |
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1 / 36 page  600 MHz, 32 × 32 Buffered Analog Crosspoint Switch AD8117/AD8118 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. FEATURES High channel count, 32 × 32 high speed, non-blocking switch array Differential or single-ended operation Differential G = +1 (AD8117) or G = +2 (AD8118) Flexible power supplies Single +5 V supply, or dual ±2.5 V supplies Serial or parallel programming of switch array High impedance output disable allows connection of multiple devices with minimal loading on output bus Excellent video performance >50 MHz 0.1 dB gain flatness 0.05%/0.05° differential gain/phase error (RL = 150 Ω) Excellent ac performance Bandwidth: 600 MHz Slew rate: 1800 V/μs Settling time: 2.5 ns to 1% Low power of 2.5 W Low all hostile crosstalk < −70 dB @ 5 MHz < −43 dB @ 600 MHz Reset pin allows disabling of all outputs (connected through a capacitor to ground provides power-on reset capability) 304-ball BGA package (31 mm × 31 mm) APPLICATIONS Routing of high speed signals including RGB and component video routing KVM Compressed video (MPEG, wavelet) Data communications FUNCTIONAL BLOCK DIAGRAM 2 2 INPUT RECEIVER G = +1* G = +2** OUTPUT BUFFER G = +1 32 1024 192 VPOS VNEG VOCM RESET UPDATE CLK DATA IN WE SER/PAR D0 D1 D2 D3 D4 D5 VDD DGND DATA OUT SWITCH MATRIX 192 A0 A1 A2 A3 A4 AD8117/ AD8118 1 0 192-BIT SHIFT REGISTER WITH 6-BIT PARALLEL LOADING PARALLEL LATCH DECODE 32 × 6:32 DECODERS *AD8117 ONLY **AD8118 ONLY Figure 1. GENERAL DESCRIPTION The AD8117/AD8118 are high speed, 32 × 32 analog crosspoint switch matrices. They offer 600 MHz bandwidth and slew rate of 1800 V/μs for high resolution computer graphics (RGB) signal switching. With less than −70 dB of crosstalk and −90 dB isolation (@ 5 MHz), the AD8117/AD8118 are useful in many high speed applications. The 0.1 dB flatness greater than 50 MHz makes the AD8117/AD8118 ideal for composite video switching. The AD8117/AD8118 include 32 independent output buffers that can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus. The AD8117 has a differential gain of +1, while the AD8118 has a differential gain of +2 for ease of use in back-terminated load applications. They operate as fully differential devices or can be configured for single-ended operation. Either a single +5 V supply or dual ±2.5 V supplies can be used, while consuming only 500 mA of idle current with all outputs enabled. The channel switching is performed via a double-buffered, serial digital control (which can accommodate daisy chaining of several devices), or via a parallel control, allowing updating of an individual output without reprogram- ming the entire array. The AD8117/AD8118 are packaged in a 304-ball BGA package and are available over the extended industrial temperature range of −40°C to +85°C. |
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