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AD9516-4BCPZ Datasheet(PDF) 1 Page - Analog Devices |
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AD9516-4BCPZ Datasheet(HTML) 1 Page - Analog Devices |
1 / 84 page 14-Output Clock Generator with Integrated 1.6 GHz VCO AD9516-4 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. FEATURES Low phase noise, phase-locked loop On-chip VCO tunes from 1.45 GHz to 1.80 GHz External VCO/VCXO to 2.4 GHz optional One differential or two single-ended reference inputs Reference monitoring capability Auto and manual reference switchover/holdover modes Autorecover from holdover Accepts references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each pair shares 1 to 32 dividers with coarse phase delay Additive output jitter 225 fS rms Channel-to-channel skew paired outputs <10 ps 2 pairs of 800 MHz LVDS clock outputs Each pair shares two cascaded 1 to 32 dividers with coarse phase delay Additive output jitter 275 fS rms Fine delay adjust (ΔT) on each LVDS output Eight 250 MHz CMOS outputs (two per LVDS output) Automatic synchronization of all outputs on power-up Manual synchronization of outputs as needed Serial control port 64-lead LFCSP APPLICATIONS Low jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers High performance instrumentation Broadband infrastructure ATE GENERAL DESCRIPTION The AD9516-41 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on- chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz may be used. The AD9516-4 emphasizes low jitter and phase noise to maximize data converter performance and can benefit other applications with demanding phase noise and jitter requirements. FUNCTIONAL BLOCK DIAGRAM REFIN REF1 REF2 CLK LF DIVIDER AND MUXs CP VCO STATUS MONITOR LVPECL LVPECL LVPECL LVDS/CMOS LVDS/CMOS SERIAL CONTROL PORT AND DIGITAL LOGIC AD9516-4 OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 DIV/Φ DIV/Φ DIV/Φ DIV/Φ DIV/Φ DIV/Φ DIV/Φ ΔT ΔT ΔT ΔT Figure 1. The AD9516-4 features six LVPECL outputs (in three pairs); four LVDS outputs (in two pairs); and eight CMOS outputs (two per LVDS output). The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz. Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024. The AD9516-4 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5.5 V. A separate LVPECL power supply can be from 2.375 V to 3.6 V. The AD9516-4 is specified for operation over the industrial range of −40°C to +85°C. 1 AD9516 is used throughout to refer to all the members of the AD9516 family. However, when AD9516-4 is used, it is referring to that specific member of the AD9516 family. |
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