1998 Feb 18

2

Philips Semiconductors

Objective specification

Complementary enhancement

mode MOS transistor

PHC20306

FEATURES

• Very low on-state resistance

• High-speed switching

• No secondary breakdown.

APPLICATIONS

• Motor and actuator driver

• Power management

• Synchronized rectification.

DESCRIPTION

One N-channel and one P-channel enhancement mode

MOS transistor in an 8-pin SOT96-1 (SO8) plastic

package.

CAUTION

The device is supplied in an antistatic package.

The gate-source input must be protected against static

discharge during transport or handling.

PINNING - SOT96-1 (SO8)

PIN

SYMBOL

DESCRIPTION

source 1

gate 1

source 2

gate 2

drain 2

drain 2

drain 1

drain 1

Fig.1 Simplified outline and symbol.

handbook, halfpage

MAM118

1

4

5

8

s1

d1 d1

d2 d2

g1

s2

g2

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

Per channel

drain-source voltage (DC)

N-channel

−

30

V

P-channel

−−30

V

source-drain diode forward voltage

N-channel

−

1V

P-channel

−−1.3

V

gate-source voltage (DC)

open drain

−±20

V

gate-source threshold voltage

V

N-channel

1

−

V

P-channel

−1

−

V

drain current (DC)

N-channel

−

8.2

A

P-channel

−−5.6

A

drain-source on-state resistance

N-channel

−

30

m

Ω

P-channel

−

65

m

Ω

total power dissipation

−

3.5

W