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SN65MLVD200ADG4 Datasheet(PDF) 4 Page - Texas Instruments |
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SN65MLVD200ADG4 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 26 page www.ti.com DRIVER ELECTRICAL CHARACTERISTICS SN65MLVD200A, SN65MLVD202A SN65MLVD204A, SN65MLVD205A SLLS573 – DECEMBER 2003 over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX UNIT |VAB| or Differential output voltage magnitude 480 650 mV |VYZ| See Figure 2 ∆|V AB| or Change in differential output voltage magnitude –50 50 mV ∆|V YZ| between logic states VOS(SS) Steady-state common-mode output voltage 0.8 1.2 V Change in steady-state common-mode output ∆V OS(SS) See Figure 3 –50 50 mV voltage between logic states VOS(PP) Peak-to-peak common-mode output voltage 150 mV VY(OC) or Maximum steady-state open-circuit output voltage 0 2.4 V VA(OC) See Figure 7 VZ(OC) or Maximum steady-state open-circuit output voltage 0 2.4 V VB(OC) VP(H) Voltage overshoot, low-to-high level output 1.2 VSS V See Figure 5 VP(L) Voltage overshoot, high-to-low level output –0.2 VSS V IIH High-level input current (D, DE) VIH = 2 V to VCC 0 10 µA IIL Low-level input current (D, DE) VIL = GND to 0.8 V 0 10 µA |IOS| Differential short-circuit output current magnitude See Figure 4 24 mA –1.4 V ≤ (V Y or VZ) ≤ 3.8 V, IOZ High-impedance state output current (driver only) –15 10 µA Other output = 1.2 V –1.4 V ≤ (V Y or VZ) ≤ 3.8 V, Other IO(OFF) Power-off output current –10 10 µA output = 1.2 V, 0 V ≤ V CC≤ 1.5 V VI = 0.4 sin(30E6πt) + 0.5 V,(3) CY or CZ Output capacitance Other input at 1.2 V, driver 3 pF disabled VAB = 0.4 sin(30E6πt) V, (3) CYZ Differential output capacitance 2.5 pF Driver disabled CY/Z Output capacitance balance, (CY/CZ) 0.99 1.01 (1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. (2) All typical values are at 25 °C and with a 3.3-V supply voltage. (3) HP4194A impedance analyzer (or equivalent) 4 Submit Documentation Feedback |
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