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IS42S16100A1-7TLI Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc

Part # IS42S16100A1-7TLI
Description  512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS42S16100A1-7TLI Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc

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IS42S16100A1
ISSI®
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
Rev. C
08/12/03
DC ELECTRICAL CHARACTERISTICS (Recommended Operation Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed Min.
Max.
Unit
IIL
Input Leakage Current
0V
≤ VIN ≤ VDD, with pins other than
–5
5
µA
the tested pin at 0V
IOL
Output Leakage Current
Output is disabled, 0V
≤ VOUT ≤ VDD
–5
5
µA
VOH
Output High Voltage Level IOUT = –2 mA
2.4
V
VOL
Output Low Voltage Level
IOUT = +2 mA
0.4
V
ICC1
Operating Current(1,2)
One Bank Operation,
CAS latency = 3
-6
160
mA
Burst Length=1
Com.
-7
140
mA
tRC
≥ tRC (min.)
Ind.
-7
160
mA
IOUT = 0mA
Com.
-10
120
mA
Ind.
-10
140
mA
ICC2P
Precharge Standby Current CKE
≤ VIL (MAX)tCK = tCK (MIN) Com.
3
mA
Ind.
4
mA
ICC2PS
(In Power-Down Mode)
tCK =
Com.
2
mA
Ind.
3
mA
ICC3N
Active Standby Current
CKE
≥ VIH (MIN)tCK = tCK (MIN)—
40
mA
ICC3NS
(In Non Power-Down Mode)
tCK =
Com.
30
mA
Ind.
30
mA
ICC4
Operating Current
tCK = tCK (MIN)
CAS latency = 3
-6
150
mA
(In Burst Mode)(1)
IOUT = 0mA
Com.
-7
130
mA
Ind.
-7
150
mA
Com.
-10
140
mA
Ind.
-10
160
mA
CAS latency = 2
-6
150
mA
Com.
-7
130
mA
Ind.
-7
150
mA
Com.
-10
140
mA
Ind.
-10
160
mA
ICC5
Auto-Refresh Current
tRC = tRC (MIN)
CAS latency = 3
-6
100
mA
Com.
-7
70
mA
Ind.
-7
90
mA
Com.
-10
140
mA
Ind.
-10
160
mA
CAS latency = 2
-6
100
mA
Com.
-7
70
mA
Ind.
-7
90
mA
Com.
-10
140
mA
Ind.
-10
160
mA
ICC6
Self-Refresh Current
CKE
≤ 0.2V
-—
1
mA
Notes:
1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time
increases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between VDD and GND for each
memory chip to suppress power supply voltage noise (voltage drops) due to these transient currents.
2. Icc1 and Icc4 depend on the output load. The maximum values for Icc1 and Icc4 are obtained with the output open state.


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