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K4S510732B-TL1L Datasheet(PDF) 6 Page - Samsung semiconductor |
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K4S510732B-TL1L Datasheet(HTML) 6 Page - Samsung semiconductor |
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6 / 11 page  K4S510732B CMOS SDRAM Rev. 0.0 Feb.2001 Preliminary DC CHARACTERISTICS (Recommended operating condition unless otherwise noted, TA = 0 to 70 °C) Parameter Symbol Test Condition Version Unit Note -75 -1H -1L Operating current (One bank active) ICC1 Burst length = 1 tRC ≥ tRC(min) IO = 0 mA 135 125 125 mA 1 Precharge standby current in power-down mode ICC2P CKE ≤ VIL(max), tCC = 10ns 4 mA ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞ 4 Precharge standby current in non power-down mode ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 30 mA ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable 25 Active Standby current in power-down mode ICC3P CKE ≤ VIL(max), tCC = 10ns 8 mA ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞ 8 Active standby current in non power-down mode (One bank active) ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 45 mA ICC3NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable 40 mA Operating current (Burst mode) ICC4 IO = 0 mA Page burst 4banks activated. tCCD = 2CLKs 170 145 145 mA 1 Refresh current ICC5 tRC ≥ tRC(min) 235 225 225 mA 2 Self refresh current ICC6 CKE ≤ 0.2V C 6 mA 3 L 4 mA 4 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S510732B-TC** 4. K4S510732B-TL** 5. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ). Notes : |
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