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PHN203 Datasheet(PDF) 4 Page - NXP Semiconductors |
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PHN203 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 7 page Philips Semiconductors Product specification Dual N-channel enhancement mode PHN203 TrenchMOS TM transistor Fig.5. Typical output characteristics, T j = 25 ˚C. I D = f(VDS); parameter VGS Fig.6. Typical on-state resistance, T j = 25 ˚C. R DS(ON) = f(ID); parameter VGS Fig.7. Typical transfer characteristics. I D = f(VGS) Fig.8. Typical transconductance, T j = 25 ˚C. g fs = f(ID) Fig.9. Normalised drain-source on-state resistance. R DS(ON)/RDS(ON)25 ˚C = f(Tj) Fig.10. Gate threshold voltage. V GS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS PHN203 0 1 2 3 4 5 6 7 8 9 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 Drain-Source Voltage, VDS (V) Drain Current, ID (A) 2.6 V 2.8 V 3 V 3.6 V Tj = 25 C VGS = 5 V 3.2 V 3.4 V 10V PHN203 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 012 34567 89 10 Drain current, ID (A) Transconductance, gfs (S) VDS > ID X RDS(ON) Tj = 25 C 150 C PHN203 0 0.1 0.2 0.3 0.4 0.5 01234 56789 10 Drain Current, ID (A) Drain-Source On Resistance, RDS(on) (Ohms) VGS =5 V 2.6V 2.8V 3.4V 10V Tj = 25 C 3.6V 3.2 V 3 V -50 0 50 100 150 0 0.5 1 1.5 2 SOT223 30V Trench Tj / C a Normalised RDS(ON) = f(Tj) PHN203 0 1 2 3 4 5 6 7 8 9 10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 Gate-source voltage, VGS (V) Drain current, ID (A) VDS > ID X RDS(ON) Tj = 25 C 150 C -60 -40 -20 0 20 40 60 80 100 120 140 Tj / C VGS(TO) / V 4 3 2 1 0 max. typ. min. January 1999 4 Rev 1.000 |
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