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TMS470R1VC348 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS470R1VC348 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 55 page TMS470R1VC338, TMS470R1VC348, TMS470R1VC3382, TMS470R1VC3482 16/32-BIT RISC ROM MICROCONTROLLERS SPNS085C – JULY 2003 – REVISED JANUARY 2006 4 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251-1443 description The TMS470R1VC338, TMS470R1VC348, TMS470R1VC3382, and TMS470R1VC3482† devices are mem- bers of the Texas Instruments TMS470R1x family of general-purpose16/32-bit reduced instruction set computer (RISC) microcontrollers. The VC3x8x microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The TMS470R1VC3x8x utilizes the big-endian format where the most significant byte of a word is stored at the lowest numbered byte and the least significant byte at the highest numbered byte. High-end embedded control applications demand more performance from their controllers while maintaining low costs. The VC3x8x RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption. The VC338/VC348/VC3382/VC3482 device contains the following: ARM7TDMI 16/32-Bit RISC CPU TMS470R1x system module (SYS) with 470+ enhancements 256K-byte ROM 10K-byte SRAM (VC3x8) 12K-byte SRAM (VC3x82) Zero-pin phase-locked loop (ZPLL) clock module Analog watchdog (AWD) timer Real-time interrupt (RTI) module Two serial peripheral interface (SPI) modules Two serial communications interface (SCI) modules Standard CAN controller (SCC) Class II serial interface (C2SIb) 10-bit multi-buffered analog-to-digital converter (MibADC), 12-input channels (VC338x), 16-input channels (VC348x) High-end timer (HET) controlling 27 I/Os (VC338x), controlling 16 I/Os (VC348x) External Clock Prescale (ECP) Up to 53 I/O pins and 1 input-only pin (VC338x), up to 49 I/O pins and 1 input-only pin (VC348x) The functions performed by the 470+ system module (SYS) include: address decoding; memory protection; memory and peripherals bus supervision; reset and abort exception management; prioritization for all internal interrupt sources; device clock control; and parallel signature analysis (PSA). This data sheet includes device- specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189). The VC3x8x memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word, and word modes. The ROM memory on this device is programmable read-only memory that is masked at the time of device fabrication. The ROM operates with a system clock frequency of up to 24 MHz. In pipeline mode, the ROM operates with a system clock frequency of up to 48MHz. For more detailed information on the ROM Pipeline Wrapper, see the TMS470R1x ROM Pipeline Wrapper (RPW) Reference Guide (literature number SPNU009). † Throughout the remainder of this document, the TMS470R1VC338, TMSVC348, TMS470R1VC3382 and TMS470R1VC3482 device names, where generic, shall be referred to as TMS470R1VC3x8x or VC3x8x; where applicable to only the 10K SRAM devices, VC3x8; where applicable to only the 12K SRAM devices, VC3x82; where applicable to only VC338 and VC3382 as VC338x; where applicable to only VC348 and VC3482 as VC348x;and, where unique, shall be referred to as either their full device name or VC338 or VC348 or VC3382 or VC3482. |
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