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1374I Datasheet(PDF) 7 Page - Linear Technology |
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1374I Datasheet(HTML) 7 Page - Linear Technology |
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7 / 32 page  7 LT1374 1374fb it much easier to frequency compensate the feedback loop and also gives much quicker transient response. Most of the circuitry of the LT1374 operates from an internal 2.9V bias line. The bias regulator normally draws power from the regulator input pin, but if the BIAS pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the regulated output voltage). This will improve efficiency if the BIAS pin voltage is lower than regulator input voltage. High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage, allowing the switch to saturate. This boosted voltage is generated with an external capacitor and diode. Two comparators are connected to the shut- down pin. One has a 2.38V threshold for undervoltage lockout and the second has a 0.4V threshold for complete shutdown. The LT1374 is a constant frequency, current mode buck converter. This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. In addition to the normal error amplifier, there is a current sense amplifier that monitors switch current on a cycle-by-cycle basis. A switch cycle starts with an oscilla- tor pulse which sets the RS flip-flop to turn the switch on. When switch current reaches a level set by the inverting input of the comparator, the flip-flop is reset and the switch turns off. Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point. This technique means that the error amplifier commands current to be delivered to the output rather than voltage. A voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor, then an abrupt 180 ° shift will occur. The current fed system will have 90 ° phase shift at a much lower frequency, but will not have the additional 90 ° shift until well beyond the LC resonant frequency. This makes SYNC: (Excludes T7 package) The sync pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 10% and 90% duty cycle. The synchroniz- ing range is equal to initial operating frequency, up to 1MHz. This pin replaces SHDN on -SYNC option parts. See Synchronizing section in Applications Information for details. SHDN: The shutdown pin is used to turn off the regulator and to reduce input drain current to a few microamperes. Actually, this pin has two separate thresholds, one at 2.38V to disable switching, and a second at 0.4V to force complete micropower shutdown. The 2.38V threshold functions as an accurate undervoltage lockout (UVLO). This can be used to prevent the regulator from operating until the input voltage has reached a predetermined level. VC: The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally PI FU CTIO S used for frequency compensation, but can do double duty as a current clamp or control loop override. This pin sits at about 1V for very light loads and 2V at maximum load. It can be driven to ground to shut off the regulator, but if driven high, current must be limited to 4mA. BIAS: (SO-8 and FE16 Packages) The BIAS pin is used to improve efficiency when operating at higher input volt- ages and light load current. Connecting this pin to the regulated output voltage forces most of the internal cir- cuitry to draw its operating current from the output voltage rather than the input supply. This is a much more efficient way of doing business if the input voltage is much higher than the output. Minimum output voltage setting for this mode of operation is 3.3V. Efficiency improvement at VIN = 20V, VOUT = 5V, and IOUT = 25mA is over 10%. NC: No Connect. Leave floating or solder to any node. BLOCK DIAGRA |
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