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MB84SF6H6H6L2-70PBS Datasheet(PDF) 10 Page - SPANSION |
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MB84SF6H6H6L2-70PBS Datasheet(HTML) 10 Page - SPANSION |
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10 / 100 page  MB84SF6H6H6L2-70 9 • Synchronous Operation (Continued) Flash_1 or 2 Load Starting Burst Address (CLK latch)*3 LH HH X H X X Addr In XX *9 HX X X High -Z HL Flash_1 or 2 Advance Burst to next address with appropriate Data presented on the Data Bus*3 LH HH L H X X X DOUT DOUT *9 HH X X X High -Z HL Flash_1 or 2 Terminate current Burst read cycle HH H H X H X X X X HIGH- Z *9 XH X X X High -Z Flash_1 or 2 Terminate current Burst read cycle and start new Burst read cycle LH HH X H X X Addr In DOUT DOUT *9 HX X X High -Z HL Flash_1 or 2 Burst Suspend LH HH H H X X X High-Z High-Z XH H X X X High -Z HL Flash_1 or 2 Synchronous Write - WE address latched*12 LH HH H L X X Addr In DIN DIN H/L L H X*4 X*4 H*4 High -Z HL Flash_1 or 2 Synchronous Write - CLK address latched*12 LH HH H X X Addr In DIN DIN *9 LH X*4 X*4 H*4 High -Z HL Flash_1 or 2 Synchronous Write -ADV address latched *12 LH HH H X X Addr In DIN DIN H/L H X*4 X*4 H*4 High -Z LL Flash_1& 2 Terminate current Burst read via RESET XX H H X H X X X HIGH- Z HIGH- Z XX L X X X High -Z FCRAM Start Address*2 Latch HH L H X*5 X*5 X*6 X*6 Valid *7 High- Z*8 High- Z*8 *9 XX X X High -Z*14 FCRAM Advance Burst Read to Next Address*2 HH L H L H X*6 X*6 X Output Valid *10 Output Valid *10 *9 HX X X X Out- put Valid FCRAM Burst Read Suspend*2 HH L H H H X*6 X*6 X High-Z High-Z *9 HX X X X High -Z*15 |
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