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MBM29SL800BD-12PFTR Datasheet(PDF) 3 Page - SPANSION |
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MBM29SL800BD-12PFTR Datasheet(HTML) 3 Page - SPANSION |
3 / 56 page MBM29SL800TD-10/12/MBM29SL800BD-10/12 3 s FEATURES • Single 1.8 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP (I) (Package suffix : TN − Normal Bend Type, TR − Reversed Bend Type) 48-ball FBGA (Package suffix : PBT) 48-ball SCSP (Package suffix : PW) • Minimum 100,000 program/erase cycles • High performance 100 ns maximum access time • Sector erase architecture One 8 Kword, two 4 Kwords, one 16 Kword, and fifteen 32 Kwords sectors in word mode One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and fifteen 64 Kbytes sectors in byte mode Any combination of sectors can be concurrently erased. Also supports full chip erase • Boot Code Sector Architecture T = Top sector B = Bottom sector • Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector • Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address •Data Polling and Toggle Bit feature for detection of program or erase cycle completion • Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion • Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode • Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device • Sector protection Hardware method disables any combination of sectors from program or erase operations • Sector Protection set function by Extended sector Protect command • Fast programming Function by Extended Command • Temporary sector unprotection Temporary sector unprotection via the RESET pin Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc. |
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