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MH2M365CNXJ-5 Datasheet(PDF) 5 Page - Mitsubishi Electric Semiconductor

Part # MH2M365CNXJ-5
Description  HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

MH2M365CNXJ-5 Datasheet(HTML) 5 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI
ELECTRIC
HYPER PAGE MODE 75497472-BIT ( 2097152-WORD BY 36-BIT ) DYNAMIC RAM
MITSUBISHI LSIs
MH2M365CXJ/CNXJ-5,-6,-7
21/Feb./1997
(
/ 15 )
MIT-DS-0083-1.2
TIMING REQUIREMENTS (For Read, Write, Refresh, and Hyper-Page Mode Cycles)
(Ta=0 ~ 70°C, Vcc = 5V ± 10%, Vss=0V, unless otherwise noted See notes 14,15)
Note 14: The timing requirements are assumed tT =3ns.
15: VIH(min) and VIL(max) are reference levels for measuring timing of input signals.
16: tRCD(max) is specified as a reference point only. If tRCD is less than tRCD(max), access time is tRAC. If tRCD is greater than tRCD(max), access
time is controlled exclusively by tCAC or tAA.
17: tRAD(max) is specified as a reference point only. If tRAD
≤ tRAD(max) and tASC ≤ tASC(max), access time is controlled exclusively by tAA.
18: tASC(max) is specified as a reference point only. If tRCD
≥ tRCD(max) and tASC ≥ tASC(max), access time is controlled exclusively by tCAC.
19: tDZC must be satisfied.
20: Either tRDD or tCDD or tODD must be satisfied.
21: tT is measured between VIH(min) and VIL(max).
Read and Refresh Cycles
Note 22: Either tRCH or tRRH must be satisfied for a read cycle.
Parameter
Refresh cycle time
RAS high pulse width
Delay time, RAS low to CAS low
Symbol
Delay time, CAS high to RAS low
Delay time, RAS high to CAS low
CAS high pulse width
(Note21)
(Note16)
(Note17)
(Note18)
16.4
45
30
0
40
13
50
20
5
10
15
10
10
0
0
1
16.4
37
25
0
30
10
50
18
5
8
13
8
8
0
0
1
Column address delay time from RAS low
Row address setup time before RAS low
Column address setup time before CAS low
Row address hold time after RAS low
Column address hold time after CAS low
Transition time
(Note19)
(Note20)
Delay time, data to CAS low
Delay time, CAS high to data
0
0
15
13
(Note20)
Delay time, RAS high to data
15
13
ms
ns
ns
ns
ns
ns
ns
Limits
Unit
Min
Max
Min
Max
ns
ns
ns
Min
Max
16.4
50
35
0
50
13
50
20
5
10
15
10
10
0
0
1
0
20
20
Parameter
Read cycle time
RAS low pulse width
CAS low pulse width
Symbol
0
CAS hold time after RAS low
Read Setup time before CAS low
Read hold time after CAS high
(Note 22)
(Note 22)
0
RAS hold time after CAS low
Read hold time after RAS high
Column address to RAS hold time
10000
10000
10000
10000
90
50
8
40
13
10
25
0
0
110
60
10
48
15
10
30
Column address to CAS hold time
13
18
ns
ns
ns
ns
ns
ns
ns
ns
Limits
Unit
Min
Max
Min
Max
ns
ns
Min
Max
10000
10000
0
0
130
70
13
55
20
10
35
23
ns
ns
ns
ns
ns
tREF
tRP
tRCD
tCRP
tRPC
tCPN
tRAD
tASR
tASC
tRAH
tCAH
tDZC
tRDD
tCDD
tT
tRC
tRAS
tCAS
tCSH
tRSH
tRCS
tRCH
tRRH
tRAL
tCAL
MH2M365C -5
MH2M365C -6
MH2M365C -7
MH2M365C
-5
MH2M365C
-6
MH2M365C
-7
5


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