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56F8023 Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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56F8023 Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 156 page 56F8023 Data Sheet, Rev. 3 4 Freescale Semiconductor Preliminary Part 1: Overview . . . . . . . . . . . . . . . . . . . . . . . 5 1.1. 56F8023 Features . . . . . . . . . . . . . . . . . . . . . 5 1.2. 56F8023 Description . . . . . . . . . . . . . . . . . . . 7 1.3. Award-Winning Development Environment . . 8 1.4. Architecture Block Diagram . . . . . . . . . . . . . 8 1.5. Product Documentation . . . . . . . . . . . . . . . . 16 1.6. Data Sheet Conventions. . . . . . . . . . . . . . . 16 Part 2: Signal/Connection Descriptions . . 17 2.1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . 17 2.2. 56F8023 Signal Pins . . . . . . . . . . . . . . . . . . 21 Part 3: OCCS . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.1. Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.3. Operating Modes . . . . . . . . . . . . . . . . . . . . . 30 3.4. Internal Clock Source . . . . . . . . . . . . . . . . . 31 3.5. Crystal Oscillator. . . . . . . . . . . . . . . . . . . . . 31 3.6. Ceramic Resonator. . . . . . . . . . . . . . . . . . . 32 3.7. External Clock Input - Crystal Oscillator Option . . . . . . . . . . . . . . 32 3.8. Alternate External Clock Input . . . . . . . . . . 33 Part 4: Memory Maps . . . . . . . . . . . . . . . . . . 33 4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.2. Interrupt Vector Table . . . . . . . . . . . . . . . . . 34 4.3. Program Map . . . . . . . . . . . . . . . . . . . . . . . 36 4.4. Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4.5. EOnCE Memory Map . . . . . . . . . . . . . . . . . . 37 4.6. Peripheral Memory-Mapped Registers . . . . 38 Part 5: Interrupt Controller (ITCN) . . . . . . . 51 5.1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . 51 5.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.3. Functional Description . . . . . . . . . . . . . . . . 52 5.4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 54 5.5. Operating Modes . . . . . . . . . . . . . . . . . . . . 54 5.6. Register Descriptions . . . . . . . . . . . . . . . . . . 54 5.7. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Part 6: System Integration Module (SIM). . 74 6.1. Introduction. . . . . . . . . . . . . . . . . . . . . . . . . 74 6.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.3. Register Descriptions . . . . . . . . . . . . . . . . . 75 6.4. Clock Generation Overview . . . . . . . . . . . . 99 6.5. Power-Saving Modes . . . . . . . . . . . . . . . . 100 6.6. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6.7. Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.8. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Part 7: Security Features . . . . . . . . . . . . . 104 7.1. Operation with Security Enabled . . . . . . . . 104 7.2. Flash Access Lock and Unlock Mechanisms . . . . . . . . . . 105 Part 8: General-Purpose Input/Output (GPIO) . . . . . . . . . . . . . . . . . . . . . . . 106 8.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . 106 8.2. Configuration . . . . . . . . . . . . . . . . . . . . . . . 106 8.3. Reset Values . . . . . . . . . . . . . . . . . . . . . . . 108 Part 9: Joint Test Action Group (JTAG) . .113 9.1. 56F8023 Information . . . . . . . . . . . . . . . . . 113 Part 10: Specifications. . . . . . . . . . . . . . . . 113 10.1. General Characteristics . . . . . . . . . . . . . . 113 10.2. DC Electrical Characteristics . . . . . . . . . . 117 10.3. AC Electrical Characteristics . . . . . . . . . . 120 10.4. Flash Memory Characteristics . . . . . . . . . 121 10.5. External Clock Operation Timing . . . . . . . 121 10.6. Phase Locked Loop Timing . . . . . . . . . . . 122 10.7. Relaxation Oscillator Timing. . . . . . . . . . . 122 10.8. Reset, Stop, Wait, Mode Select, and Interrupt Timing. . . . . . . . . . . 124 10.9. Serial Peripheral Interface (SPI) Timing . 125 10.10. Quad Timer Timing . . . . . . . . . . . . . . . . 128 10.11. Serial Communication Interface (SCI) Timing. . . . . . . . . . . . . . . . . 129 10.12. Inter-Integrated Circuit Interface (I2C) Timing . . . . . . . . . . . . . . . . . 130 10.13. JTAG Timing . . . . . . . . . . . . . . . . . . . . . 131 10.14. Analog-to-Digital Converter (ADC) Parameters . . . . . . . . . . . . 133 10.15. Equivalent Circuit for ADC Inputs . . . . . . 134 10.16. Comparator (CMP) Parameters . . . . . . . 134 10.17. Digital-to-Analog Converter (DAC) Parameters . . . . . . . . . . . . 135 10.18. Power Consumption . . . . . . . . . . . . . . . 136 Part 11: Packaging . . . . . . . . . . . . . . . . . . . 138 11.1. 56F8023 Package and Pin-Out Information . . . . . . . . . . . 138 Part 12: Design Considerations . . . . . . . . .141 12.1. Thermal Design Considerations . . . . . . . . 141 12.2. Electrical Design Considerations . . . . . . . 142 Part 13: Ordering Information . . . . . . . . . . 143 Part 14: Appendix. . . . . . . . . . . . . . . . . . . . 144 56F8023 Data Sheet Table of Contents |
Similar Part No. - 56F8023_07 |
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Similar Description - 56F8023_07 |
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