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MITSUBISHI |
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6 page
MITSUBISHI LSIs MITSUBISHI ELECTRIC MH32D72AKLB-75,-10 2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module MIT-DS-0399-0.2 21.Mar.2001 Preliminary Spec. Some contents are subject to change without notice. 6 COMM AND TRUTH TABLE H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number COMMAND MNEMONIC CKE0 n-1 CKE0 n /S /RAS /CAS /WE BA0,1 A10 /AP A0-9, 11 Deselect DESEL H X H X X X X X X No Operation NOP H X L H H H X X X Row Address Entry & Bank Activate ACT H X L L H H V V V Single Bank Precharge PRE H X L L H L V L X Precharge All Banks PREA H X L L H L H X Column Address Entry & Write WRITE H X L H L L V L V Column Address Entry & Write with Auto-Precharge WRITEA H X L H L L V H V Column Address Entry & Read READ H X L H L H V L V Column Address Entry & Read with Auto-Precharge READA H X L H L H V H V Auto-Refresh REFA H H L L L H X X X Self-Refresh Entry REFS H L L L L H X X X Self-Refresh Exit REFSX L H H X X X X X X L H L H H H X X X Burst Terminate TERM H X L H H L X X X Mode Register Set MRS H X L L L L L L V X note 1 NOTE: 1. Applies only to read bursts with autoprecharge disabled; this command is undefined (and should not be used) for read bursts with autoprecharge enabled, and for write bursts. 2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A11 provide the op-code to be written to the selected Mode Register. 2 |
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