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MC68HC908MR8CFA Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC68HC908MR8CFA Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 372 page  Technical Data MC68HC908MR8 — Rev 4.1 10 Table of Contents Freescale Semiconductor Table of Contents 7.7.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106 7.7.3 SIM Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . .106 7.7.4 SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . .108 7.7.5 SIM Break Flag Control Register . . . . . . . . . . . . . . . . . . . .109 Section 8. Clock Generator Module (CGM) 8.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .111 8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112 8.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112 8.4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 8.4.1 Crystal Oscillator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . .113 8.4.2 Phase-Locked Loop Circuit (PLL) . . . . . . . . . . . . . . . . . . .115 8.4.2.1 PLL Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115 8.4.2.2 Acquisition and Tracking Modes . . . . . . . . . . . . . . . . . .118 8.4.2.3 Manual and Automatic PLL Bandwidth Modes . . . . . . .118 8.4.2.4 Programming the PLL . . . . . . . . . . . . . . . . . . . . . . . . . .120 8.4.2.5 Special Programming Exceptions . . . . . . . . . . . . . . . . .121 8.4.3 Base Clock Selector Circuit . . . . . . . . . . . . . . . . . . . . . . . .121 8.4.4 CGM External Connections . . . . . . . . . . . . . . . . . . . . . . . .122 8.5 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123 8.5.1 Crystal Amplifier Input Pin (OSC1). . . . . . . . . . . . . . . . . . .123 8.5.2 Crystal Amplifier Output Pin (OSC2) . . . . . . . . . . . . . . . . .123 8.5.3 External Filter Capacitor Pin (CGMXFC) . . . . . . . . . . . . . .123 8.5.4 PLL Analog Power Pin (VDDA) . . . . . . . . . . . . . . . . . . . . . .124 8.5.5 Oscillator Enable Signal (SIMOSCEN). . . . . . . . . . . . . . . .124 8.5.6 Crystal Output Frequency Signal (CGMXCLK) . . . . . . . . .124 8.5.7 CGM Base Clock Output (CGMOUT). . . . . . . . . . . . . . . . .124 8.5.8 CGM CPU Interrupt (CGMINT) . . . . . . . . . . . . . . . . . . . . .124 8.6 CGM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125 8.6.1 PLL Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126 8.6.2 PLL Bandwidth Control Register . . . . . . . . . . . . . . . . . . . .129 8.6.3 PLL Programming Register . . . . . . . . . . . . . . . . . . . . . . . .131 8.7 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132 8.8 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133 8.9 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133 |
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