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AU5780D Datasheet(PDF) 6 Page - NXP Semiconductors |
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AU5780D Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 10 page Philips Semiconductors Product specification AU5780 SAE/J1850/VPW transceiver 1998 Jun 30 6 CHARACTERISTICS –40 °C < Tamb < +125°C; 6V < VBATT< 16V; V/LB> 3V; 0 < VBUS< +8.5V; RS= 56 kW Rd= 10 kW; Rf = 15 kW; Rb= 10W; 300 W< RL< 1.6 kW; all voltages are referenced to pin 8 (GND); positive currents flow into the IC; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT IBATT.id supply current; bus idle TX low; Note 1 200 µA IBATT.p supply current; passive state TX low 1.5 mA IBATT.oc supply current; no load TX high 8 mA IBATT.sc supply current; bus short to GND TX high, VBO = 0V 50 mA Tsd Thermal shutdown 155 °C Thys Thermal shutdown hysteresis 5 15 °C Pins TX and /LB Vih High level input voltage 3 V Vil Low level input voltage 0.9 V Vh Input hysteresis 0.4 V Iih2 TX high level input current Vi = 5V 12 50 µA Iih6 /LB high level input current Vi = 5V 3 10 µA Pin RX Vol Low level output voltage Io = 1.6 mA 0.4 V Iih High level output leakage Vo = 5V –10 +10 µA Irx RX output current Vo = 5V 4 20 mA Pin BUS_OUT Volb BUS_OUT in loop-back mode; TX high or low /LB low or floating; 0<VBATT < 24V; RL=1.6kΩ 0.1 V Vol BUS_OUT voltage; passive TX low or floating; 0<VBATT < 24V; RL=1.6kΩ 0.1 V Voh BUS_OUT voltage; active TX high; Note 2 9V<VBATT < 24V; 300 Ω < RL<1.6kΩ; 7.3 8 V Vohb BUS_OUT voltage; low battery TX high; 6V<VBATT <9V; 300 Ω < RL< 1.6kΩ; Note 2 VBATT – 1.7 8 V – IBO.LIM BUS_OUT source current; bus positive TX high; 0V< Vbus <+8.5V 47 mA – IBO.LIMn BUS_OUT source current; bus negative TX high; –17V< Vbus < 0V 55 mA – IBO.LK BUS_OUT leakage current; TX low; bus positive TX low; 0V<VBATT<24V; 0V< Vbus <+17V –10 +10 µA – IBO.N BUS_OUT leakage current; TX low; bus negative TX low; 0V<VBATT<24V; –17V< Vbus < 0V –10 +100 µA – IBO.LOG BUS_OUT leakage current with loss of ground 0V<VBATT<16V –10 100 µA Pin BUS_IN Vih Input high voltage 4.1 V Vil Input low voltage 3.65 V Vh Input hysteresis 100 mV Vilk Input leakage current –17V < Vbus < +17V –5 +5 µA |
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