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XRT83L34 Datasheet(PDF) 8 Page - Exar Corporation |
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XRT83L34 Datasheet(HTML) 8 Page - Exar Corporation |
8 / 99 page XRT83L34 xr REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR 5 PIN DESCRIPTION BY FUNCTION RECEIVE SECTIONS SIGNAL NAME PIN # TYPE DESCRIPTION RLOS_0 RLOS_1 RLOS_2 RLOS_3 4 28 75 99 O Receiver LOS (Loss of Signal) Defect Indicator Output for Channel _n This output pin indicates whether or not the Receive Section associated with Channel n (within the LIU device) is declaring the LOS defect condition, as depicted below. LOGIC LOW - Indicates that this particular channel is currently not declaring the LOS defect condition. LOGIC HIGH - Indicates that this particular channel is currently declaring the LOS defect condition. See “Receiver Loss of Signal (RLOS)” on page 28. RCLK_0 RCLK_1 RCLK_2 RCLK_3 5 27 76 98 O Receiver Clock Output for Channel _n The Receive Section (of a given channel within the XRT83L34 device) will update the RPOS_n and RNEG_n/LCV_n output pins upon either the rising or falling edge of this output clock signal (depending upon user configura- tion). RNEG_0/ LCV_0 RNEG_1/ LCV_1 RNEG_2/ LCV_2 RNEG_3/ LCV_3 6 26 77 97 O Receiver Negative-Polarity Data Output/Line Code Violation Indicator Output - Channel n: The exact function of this output pin depends upon whether the XRT83L34 device has been configured to operate in the Single-Rail or Dual-Rail Mode, as described below. Dual-Rail Mode Operation - Receive Negative-Polarity Data Output - RNEG_n: The Receive Section of Channel n will output the negative-polarity portion of the recovered incoming DS1/E1 data (from the remote terminal equipment) via this output pin. Each channel (within the XRT83L34 device) will update this incoming DS1/E1 data upon the "user-selected" edge of the RCLK_n output signal. The "Positive-Polarity Portion" of the recovered incoming DS1/E1 data will be output via the RPOS_n output pin. Single-Rail Mode Operation - Line Code Violation Indicator Output - LCV_n: The Receive Section of Channel n will pulse this output pin "high" (for one RCLK_n period) each time it detects a Line Code Violation within the incom- ing DS1/E1 line signal. Each channel (within the XRT83L34 device) will update this output pin upon the "user-selected" edge of the RCLK_n output signal. |
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