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XRT94L31 Datasheet(PDF) 7 Page - Exar Corporation

Part # XRT94L31
Description  3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT94L31 Datasheet(HTML) 7 Page - Exar Corporation

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XRT94L31
7
REV. 1.0.1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
AF21
PDBEN_L
I
TTL
Bi-directional Data Bus Enable Input pin:
This input pin is used to either enable or tri-state the Bi-Directional Data
Bus pins (D[7:0]), as described below.
Setting this input pin "Low" enables the Bi-directional Data bus.
Setting this input "High" tri-states the Bi-directional Data Bus.
AF20
PBLAST_L
I
TTL
Last Burst Transfer Indicator input pin:
If the Microprocessor Interface is operating in the Intel-I960 Mode, then
this input pin is used to indicate (to the Microprocessor Interface block)
that the current data transfer is the last data transfer within the current
burst operation.
The Microprocessor should assert this input pin (by toggling it "Low") in
order to denote that the current READ or WRITE operation (within a
BURST operation) is the last operation of this BURST operation.
NOTE: Connect this input pin to GND whenever the Microprocessor
Interface has been configured to operate in the Intel-Async,
Motorola 68K and IBM PowerPC 403 modes.
AG22
PINT_L
O
CMOS
Interrupt Request Output:
This open-drain, active-low output signal will be asserted when the Map-
per/Framer device is requesting interrupt service from the Microproces-
sor. This output pin should typically be connected to the Interrupt
Request input of the Microprocessor.
AB24
RESET_L
I
TTL
Reset Input:
When this active-low signal is asserted, the XRT94L31 will be asynchro-
nously reset. When this occurs, all outputs will be tri-stated and all on-
chip registers will be reset to their default values.
AE18
DIRECT_ADD_SEL
I
TTL
Address Location Select input pin:
This input pin must be pulled "High" in order to permit normal operation
of the Microprocessor Interface.
SONET/SDH SERIAL LINE INTERFACE PINS
T3
RXLDAT_P
I
LVPEC
L
Receive STS-3/STM-1 Data - Positive Polarity PECL Input:
This input pin, along with RXLDAT_N functions as the Recovered Data
Input, from the Optical Transceiver or as the Receive Data Input from the
system back-plane
NOTE: For APS (Automatic Protection Switching) purposes, this input
pin, along with RXLDAT_N functions as the Primary STS-3/
STM-1 Receive Data Input Port.
T2
RXLDAT_N
I
LVPEC
L
Receive STS-3/STM-1 Data - Negative Polarity PECL Input:
This input pin, along with RXLDAT_P functions as the Recovered Data
Input, from the Optical Transceiver or as the Receive Data Input from the
system back-plane.
NOTE: For APS (Automatic Protection Switching) purposes, this input
pin, along with RXLDAT_P functions as the Primary Receive
STS-3/STM-1 Data Input Port
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION


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