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XRT94L33 Datasheet(PDF) 10 Page - Exar Corporation

Part # XRT94L33
Description  3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER ATM/PPP - HARWARE MANUAL
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT94L33 Datasheet(HTML) 10 Page - Exar Corporation

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XRT94L33
3
33 ---C
C
C H
H
H A
A
AN
N
N N
N
N E
E
E L
L
L D
D
D S
S
S 3
33 ///E
E
E 3
33 ///S
S
S T
T
T S
S
S -
-- 1
11 T
T
T O
O
O S
S
S T
T
T S
S
S -
-- 3
33 ///S
S
S T
T
T M
M
M -
-- 1
11 M
M
M A
A
AP
P
P P
P
P E
E
E R
R
R S
S
S O
O
O N
N
N E
E
E T
T
T A
A
AT
T
T M
M
M ///P
P
P P
P
P P
P
P
H
H
H A
A
AR
R
R W
W
W A
A
A R
R
R E
E
E M
M
M A
A
AN
N
N U
U
U A
A
AL
L
L
Rev 2
22 ...0
00 ...0
00
10
PIN #
SIGNAL NAME
I/O
SIGNAL
TYPE
DESCRIPTION
U2
RXLDAT_R_P
I
LVPECL
Receive STS-3/STM-1 Data – Positive Polarity PECL Input –
Redundant Port:
This input pin, along with “RXLDAT_R_N” functions as the
Recovered Data Input, from the Optical Transceiver or as the
Receive Data Input from the system back-plane.
Note:
For APS (Automatic Protection Switching) purposes,
this input pin, along with “RXLDAT_R_N” functions as
the “Redundant Receive STS-3/STM-1 Data Input
Port”.
U1
RXLDAT_R_N
I
LVPECL
Receive STS-3/STM-1 Data – Negative Polarity PECL Input –
Redundant Port:
This input pin, along with “RXLDAT_R_P” functions as the
Recovered Data Input, from the Optical Transceiver or as the
Receive Data Input from the system back-plane.
Note:
For APS (Automatic Protection Switching) purposes,
this input pin, along with “RXLDAT_R_N” functions as
the “Redundant Receive STS-3/STM-1 Data Input
Port”.
AE27
RXCLK_19MHZ
O
CMOS
19.44MHz Recovered Output Clock:
This pin outputs a 19.44MHz clock signal that has been derived
from the incoming STS-3/STM-1 line signal (via the Receive
STS-3/STM-1 Clock and Data Recovery PLL).
If the user wishes to operate the STS-3/STM-1 Interface in the
“loop-timing” mode, then the user should route this particular
signal through a “narrow-band” PLL (in order to attenuate any
jitter within this signal) prior to routing it to the REFTTL input pin.
P3
REFCLK_P
I
LVPECL
Transmit Reference Clock – Positive Polarity PECL Input:
This input pin, along with “REFCLK_N” and “REFTTL” can be
configured to function as the timing source for the STS-3/STM-1
Transmit Interface Block.
If the user configures these two input pins to function as the
timing source, then the user must apply a 155.52MHz clock
signal, in the form of a PECL signal to these input pins. The user
can configure these two inputs to function as the timing source
by writing the appropriate data into the “Transmit Line Interface
Control Register “ (Address Location = 0x0383)
Note:
Users should set this pin to “1” if “REFTTL” clock input
is used
P2
REFCLK_N
I
LVPECL
Transmit Reference Clock – Negative Polarity PECL Input:
This input pin, along with “REFCLK_P” and “REFTTL” can be
configured to function as the timing source for the STS-3/STM-1
Transmit Interface Block.
If the user configures these two input pins to function as the
timing source, then the user must apply a 155.52MHz clock
signal, in the form of a PECL signal to these input pins. The user
can configure these two inputs to function as the timing source
by writing the appropriate data into the “Transmit Line Interface
Control Register “ (Address Location = 0x0383)
Note:
Users should set this pin to “0” if “REFTTL” clock input
is used


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