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XRK39910 Datasheet(PDF) 4 Page - Exar Corporation |
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XRK39910 Datasheet(HTML) 4 Page - Exar Corporation |
4 / 9 page XRK39910 4 3.3V LOW SKEW PLL CLOCK DRIVER REV. 1.0.0 NOTE: (1) These inputs are normally wired to VDD, GND, or unconnected. Internal termination resistors bias unconnected inputs to VDD/2. If these inputs are switched, the function and timing of the outputs may be glitched, and the PLL may require an additional tLOCK time before all datasheet limits are achieved. NOTE: (1) For eight outputs, each loaded with 20pF. NOTE: (1) Where pulse width implied by DH is less than tPWC limit, tPWC limit applies. I3 3-Level Input DC Current (BYPASS, FSEL) VIN = VDD HIGH Level +400 μA VIN = VDD/2 MID Level +200 VIN = GND LOW Level +400 IPU Input Pull-Up current (PE) VDD = Max., VIN = GND +100 μA IPD Input Pull-Down Current (OE) VDD= Max., VIN = VDD +100 μA VOH Output HIGH Voltage VDD = Min., IOH = -12mA 2.4 V VOL Output LOW Voltage VDD = Min., IOL = 12mA 0.55 V TABLE 7: POWER SUPPLY CHARACTERISTICS SYMBOL PARAMETER TEST CONDITIONS(1) TYP. MAX. UNIT IDDQ Quiescent Power Supply Current VDD=Max., BYPASS=MID, CLKIN=LOW VDD/PE=LOW, OE=LOW, All outputs unloaded 8 25 mA ITOT Total Power Supply Current VDD=3.3V, FREF=25MHz, CL=160pF(1) 34 mA VDD=3.3V, FREF=33MHz, CL=160pF(1) 42 VDD=3.3V, FREF=66MHz, CL=160pF(1) 76 TABLE 8: INPUT TIMING REQUIREMENTS SYMBOL DESCRIPTION(1) MIN. MAX. UNIT tR, tF Maximum input rise and fall times, 0.8V to 2V 10 ns/V tPWC Input clock pulse, HIGH or LOW 3 ns DH Input duty cycle 10 90 % Ref Reference Clock Input 15 85 MHz TABLE 6: DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE SYMBOL PARAMETER CONDITIONS MIN.MAX.UNIT |
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