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XRT83SL314 Datasheet(PDF) 5 Page - Exar Corporation |
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XRT83SL314 Datasheet(HTML) 5 Page - Exar Corporation |
5 / 83 page xr XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.1 II 2.10 RXMUTE (RECEIVER LOS WITH DATA MUTING) ..................................................................................... 26 FIGURE 18. SIMPLIFIED BLOCK DIAGRAM OF THE RXMUTE FUNCTION................................................................................................... 26 3.0 T1/E1 APPLICATIONS ........................................................................................................................ 27 3.1 LOOPBACK DIAGNOSTICS .......................................................................................................................... 27 3.1.1 LOCAL ANALOG LOOPBACK .................................................................................................................................. 27 FIGURE 19. SIMPLIFIED BLOCK DIAGRAM OF LOCAL ANALOG LOOPBACK................................................................................................ 27 3.1.2 REMOTE LOOPBACK ................................................................................................................................................ 27 FIGURE 20. SIMPLIFIED BLOCK DIAGRAM OF REMOTE LOOPBACK .......................................................................................................... 27 3.1.3 DIGITAL LOOPBACK ................................................................................................................................................. 28 FIGURE 21. SIMPLIFIED BLOCK DIAGRAM OF DIGITAL LOOPBACK ........................................................................................................... 28 3.1.4 DUAL LOOPBACK ..................................................................................................................................................... 28 FIGURE 22. SIMPLIFIED BLOCK DIAGRAM OF DUAL LOOPBACK ............................................................................................................... 28 3.2 84-CHANNEL T1/E1 MULTIPLEXER/MAPPER APPLICATIONS ................................................................. 29 FIGURE 23. SIMPLIFIED BLOCK DIAGRAM OF AN 84-CHANNEL APPLICATION ........................................................................................... 29 TABLE 7: CHIP SELECT ASSIGNMENTS .................................................................................................................................................. 29 3.3 LINE CARD REDUNDANCY .......................................................................................................................... 30 3.3.1 1:1 AND 1+1 REDUNDANCY WITHOUT RELAYS .................................................................................................... 30 3.3.2 TRANSMIT INTERFACE WITH 1:1 AND 1+1 REDUNDANCY .................................................................................. 30 FIGURE 24. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT INTERFACE FOR 1:1 AND 1+1 REDUNDANCY................................................ 30 3.3.3 RECEIVE INTERFACE WITH 1:1 AND 1+1 REDUNDANCY..................................................................................... 30 FIGURE 25. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE INTERFACE FOR 1:1 AND 1+1 REDUNDANCY.................................................. 31 3.3.4 N+1 REDUNDANCY USING EXTERNAL RELAYS ................................................................................................... 31 3.3.5 TRANSMIT INTERFACE WITH N+1 REDUNDANCY ................................................................................................ 32 FIGURE 26. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT INTERFACE FOR N+1 REDUNDANCY ............................................................ 32 3.3.6 RECEIVE INTERFACE WITH N+1 REDUNDANCY ................................................................................................... 33 FIGURE 27. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE INTERFACE FOR N+1 REDUNDANCY .............................................................. 33 3.4 POWER FAILURE PROTECTION .................................................................................................................. 34 3.5 OVERVOLTAGE AND OVERCURRENT PROTECTION ............................................................................... 34 3.6 NON-INTRUSIVE MONITORING .................................................................................................................... 34 FIGURE 28. SIMPLIFIED BLOCK DIAGRAM OF A NON-INTRUSIVE MONITORING APPLICATION ..................................................................... 34 4.0 TRANSMIT PATH LINE INTERFACE ................................................................................................. 35 FIGURE 29. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT PATH ......................................................................................................... 35 4.1 TCLK/TPOS/TNEG DIGITAL INPUTS ............................................................................................................ 35 FIGURE 30. TRANSMIT DATA SAMPLED ON FALLING EDGE OF TCLK...................................................................................................... 35 FIGURE 31. TRANSMIT DATA SAMPLED ON RISING EDGE OF TCLK........................................................................................................ 35 TABLE 8: TIMING SPECIFICATIONS FOR TCLK/TPOS/TNEG.................................................................................................................. 36 4.2 HDB3/B8ZS ENCODER .................................................................................................................................. 36 TABLE 9: EXAMPLES OF HDB3 ENCODING ............................................................................................................................................ 36 TABLE 10: EXAMPLES OF B8ZS ENCODING........................................................................................................................................... 36 4.3 TRANSMIT JITTER ATTENUATOR ............................................................................................................... 37 TABLE 11: MAXIMUM GAP WIDTH FOR MULTIPLEXER/MAPPER APPLICATIONS......................................................................................... 37 4.4 TAOS (TRANSMIT ALL ONES) ..................................................................................................................... 37 FIGURE 32. TAOS (TRANSMIT ALL ONES) ............................................................................................................................................ 37 4.5 TRANSMIT DIAGNOSTIC FEATURES .......................................................................................................... 37 4.5.1 ATAOS (AUTOMATIC TRANSMIT ALL ONES)......................................................................................................... 38 FIGURE 33. SIMPLIFIED BLOCK DIAGRAM OF THE ATAOS FUNCTION ..................................................................................................... 38 4.5.2 NETWORK LOOP UP CODE...................................................................................................................................... 38 FIGURE 34. NETWORK LOOP UP CODE GENERATION ............................................................................................................................ 38 4.5.3 NETWORK LOOP DOWN CODE ............................................................................................................................... 38 FIGURE 35. NETWORK LOOP DOWN CODE GENERATION ....................................................................................................................... 38 4.5.4 QRSS GENERATION.................................................................................................................................................. 39 TABLE 12: RANDOM BIT SEQUENCE POLYNOMIALS................................................................................................................................39 4.6 TRANSMIT PULSE SHAPER AND FILTER ................................................................................................... 39 4.6.1 T1 SHORT HAUL LINE BUILD OUT (LBO) ............................................................................................................... 40 TABLE 13: SHORT HAUL LINE BUILD OUT.............................................................................................................................................. 40 4.6.2 ARBITRARY PULSE GENERATOR FOR T1 AND E1............................................................................................... 40 FIGURE 36. ARBITRARY PULSE SEGMENT ASSIGNMENT ......................................................................................................................... 40 4.7 DMO (DIGITAL MONITOR OUTPUT) ............................................................................................................. 40 4.8 LINE TERMINATION (TTIP/TRING) ............................................................................................................... 41 FIGURE 37. TYPICAL CONNECTION DIAGRAM USING INTERNAL TERMINATION ......................................................................................... 41 5.0 MICROPROCESSOR INTERFACE BLOCK ....................................................................................... 42 TABLE 14: SELECTING THE MICROPROCESSOR INTERFACE MODE.......................................................................................................... 42 FIGURE 38. SIMPLIFIED BLOCK DIAGRAM OF THE MICROPROCESSOR INTERFACE BLOCK ........................................................................ 42 5.1 THE MICROPROCESSOR INTERFACE BLOCK SIGNALS ......................................................................... 43 |
Similar Part No. - XRT83SL314_05 |
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Similar Description - XRT83SL314_05 |
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