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XRT91L306 Datasheet(PDF) 10 Page - Exar Corporation |
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XRT91L306 Datasheet(HTML) 10 Page - Exar Corporation |
10 / 39 page XRT91L30 xr STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER REV. 1.0.1 8 REFCLKP REFCLKN LVPECL Diff I 16 17 Reference Clock Input (77.76 MHz or 19.44 MHz) This differential clock input reference is used for the transmit clock multiplier unit (CMU) and clock data recovery (CDR) to provide the necessary high speed clock reference for this device. It will accept either a 77.76 MHz or a 19.44 MHz Differ- ential LVPECL clock source. Pin CMUFREQSEL determines the value used as the reference. See Pin CMUFREQSEL for more details. REFCLKP/N inputs are internally biased to 1.65V. NOTE: In the event that TTLREFCLK LVTTL input is used instead of these differential inputs for clock reference, the REFCLKP should be tied to ground. TTLREFCLK LVTTL, LVCMOS I 36 TTL Reference Clock Input (77.76 MHz or 19.44 MHz) This optional LVTTL clock input reference is used for the trans- mit clock multiplier unit (CMU) and clock data recovery (CDR) to provide the necessary high speed clock reference for this device rather than a differential clock source. It will accept either a 77.76 MHz or a 19.44 MHz LVTTL clock source. Pin CMUFREQSEL determines the value used as the reference. See Pin CMUFREQSEL for more details. NOTE: In the event that REFCLKP/N differential inputs are used instead of this LVTTL input for clock reference, the TTLREFCLK should be tied to ground. TRANSMITTER SECTION NAME LEVEL TYPE PIN DESCRIPTION |
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