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XRT8000ID Datasheet(PDF) 9 Page - Exar Corporation

Part # XRT8000ID
Description  Clock Synchronizer/Adapter for Communications
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT8000ID Datasheet(HTML) 9 Page - Exar Corporation

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XRT8000
9
Rev. 1.11
CR1 Register (Power On State = “00000”)
D0 (PL1EN):
Enable control for PLL1. If PL1EN = “1”, then PLL1 is
enabled. Otherwise, if PL1EN = “0”, then PLL1 is
disabled.
D1~D4 (IOC1~IOC4):
These four bit-fields function as the control bits for PLL1
and PLL2 operation modes. These bits select
FORWARD, REVERSE, DATA, Kx56 or Kx64 clock rates.
Multiplier “K” in Kx56 and Kx64 refers to harmonics of
56kHz or 64kHz clocks, this notation is extended to
1,544kHz and 2,048kHz frequencies in the following
table (Table 2).
Note:
The value of “K” for PLL1 and PLL2 are independent of
each other.
Table 2
Table 2 creates the values of D1 through D4 within the
CRI command register to the operating mode of the
XRT8000 device.
IOC4
IOC3
IOC2
IOC1
Input Freq.
[kHz]
PLL1 Output
[kHz]
PLL2 Output
[kHz]
Mode
0
0
0
0
nx1544
Kx56
Kx56
Forward
0
0
0
1
nx1544
Kx56
Kx64
Forward
0
0
1
0
nx1544
Kx64
Kx64
Forward
0
0
1
1
nx1544
Kx56
DATA
Forward
0
1
0
0
nx1544
Kx64
DATA
Forward
0
1
0
1
nx1544
DATA
DATA
Forward
0
1
1
0
56
1544
1544
Reverse
0
1
1
1
8K
1544
2048
Reverse
1
0
0
0
nx2048
Kx56
Kx56
Forward
1
0
0
1
nx2048
Kx56
Kx64
Forward
1
0
1
0
nx2048
Kx64
Kx64
Forward
1
0
1
1
nx2048
Kx56
DATA
Forward
1
1
0
0
nx2048
Kx64
DATA
Forward
1
1
0
1
nx2048
DATA
DATA
Forward
1
1
1
0
8
1544
2048
Reverse
1
1
1
1
64
2048
2048
Reverse
Table 2. Operation Mode/Output Clock Frequency Select Options
Via the D1 Through D4 Bits within the CRI Register
Note:
1
The values of “n” are selected via the M1 through M4 bits, within the CR2 Register (see Table 3).
2
The values of “k” are selected via the Sel14 through SelP bits within the CR3 Register (see Table 4).


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