2-9
RF2103P
Rev B2 060202
Pin
Function
Description
Interface Schematic
1RF IN
RF input pin. There is an internal blocking capacitor between this pin
and the preamp input, but not between the pin and an internal 2k
Ω
resistor to ground.
2GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
3GND
Same as pin 2.
4PD
Power down control voltage. When this pin is at 0V, the device will be in
power down mode, dissipating minimum DC power. When this pin is at
VCC (3V to 6.5V), the device will be in full power mode delivering maxi-
mum available gain and output power capability. This pin may also be
used to perform some degree of gain control or power control when set
to voltages between 0V and VCC. It is not optimized for this function so
the transfer function is not linear over a wide range as with other
devices specifically designed for analog gain control; however, it may
be usable for coarse adjustment or in some closed loop AGC systems.
This pin should not, in any circumstance, be higher in voltage than VCC.
This pin should also have an external bypassing capacitor.
5VCC1
Positive supply for the active bias circuits. This pin can be externally
combined with pin 6 (VCC2) and the pair bypassed with a single capac-
itor, placed as close as possible to the package. Additional bypassing
of 1μF is also recommended, but proximity to the package is not as crit-
ical. In most applications, pins 5, 6, and 7 can share a single 1μF
bypass capacitor.
6VCC2
Same as pin 5.
7PREAMP
PWR
Positive supply for the pre-amplifier. This is an unmatched transistor
collector output. This pin should see an inductive path to AC ground
(VCC with bypass capacitor). This inductance can be achieved with a
short, thin microstrip line or with a low value chip inductor (approxi-
mately 1.8nH). At lower frequencies, the inductance value should be
larger (longer microstrip line) and VCC should be bypassed with a
larger bypass capacitor. This inductance forms a matching network
with the internal series capacitor between the two amplifier stages, set-
ting the amplifier’s frequency of maximum gain. An additional 1
μF
bypass capacitor in parallel with the 100pF bypass capacitor is also
recommended, but placement of this component is not as critical. In
most applications, pins 5, 6, and 7 can share a single 1
μF bypass
capacitor.
8RF OUT
Same as pin 14.
9RF OUT
Same as pin 14.
10
GND
Same as pin 2.
11
GND
Same as pin 2.
12
GND
Same as pin 2.
13
RF OUT
Same as pin 14.
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