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SP7653 Datasheet(PDF) 8 Page - Sipex Corporation |
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SP7653 Datasheet(HTML) 8 Page - Sipex Corporation |
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8 / 15 page  Date: /20/06 SP7653 Wide Input Voltage Range, .3MHz, Buck Regulator © Copyright 2006 Sipex Corporation 8 Date: 2/17/06 SP7653 Wide Input Voltage Range, 1.3MHz, Buck Regulator © Copyright 2006 Sipex Corporation Output Capacitor Selection The required ESR (Equivalent Series Resis- tance) and capacitance drive the selection of the type and quantity of the output capacitors. The ESR must be small enough that both the resis- tive voltage deviation due to a step change in the load current and the output ripple voltage do not exceed the tolerance limits expected on the output voltage. During an output load transient, the output capacitor must supply all the addi- tional current demanded by the load until the SP7653 adjusts the inductor current to the new value. In order to maintain VOUT ,the capacitance must be large enough so that the output voltage is held up while the inductor current ramps to the value corresponding to the new load current. Addi- tionally, the ESR in the output capacitor causes a step in the output voltage equal to the current. Because of the fast transient response and inher- ent 100% to 0% duty cycle capability provided by the SP7653 when exposed to an output load transient, the output capacitor is typically cho- sen for ESR, not for capacitance value. The ESR of the output capacitor, combined with the inductor ripple current, is typically the main contributor to output voltage ripple. The maxi- mum allowable ESR required to maintain a specified output voltage ripple can be calculated by: RESR VOUT IPK-PK where: VOUT = Peak-to-Peak Output Voltage Ripple IPK-PK = Peak-to-Peak Inductor Ripple Current The total output ripple is a combination of the ESR and the output capacitance value and can be calculated as follows: VOUT = (IPP(1–D))2+(IPPRESR)2 COUTFS FS = Switching Frequency D = Duty Cycle COUT = Output Capacitance Value Input Capacitor Selection The input capacitor should be selected for ripple current rating, capacitance and voltage rating. The input capacitor must meet the ripple current requirement imposed by the switching current. In continuous conduction mode, the source cur- rent of the high-side MOSFET is approximately a square wave of duty cycle VOUT/VIN. More accurately, the current wave form is trapezoidal, given a finite turn-on and turn-off, switch tran- sition slope. Most of this current is supplied by the input bypass capacitors. The RMS current handling capability of the input capacitors is determined at maximum output current and under the assumption that the peak-to-peak in- ductor ripple current is low; it is given by: I CIN(RMS) = IOUT(max) D(1 - D) The worst case occurs when the duty cycle D is 50% and gives an RMS current value equal to IOUT/2. Select input capacitors with adequate ripple current rating to ensure reliable opera- tion. The power dissipated in the input capacitor is: ) ( 2 ) ( CIN ESR rms CIN CIN R I P = This can become a significant part of power losses in a converter and hurt the overall energy transfer efficiency. The input voltage ripple primarily depends on the input capacitor ESR and capacitance. Ignoring the inductor ripple current, the input voltage ripple can be deter- mined by: 2 ) ( ) ( (max) ) ( IN IN S OUT IN OUT MAX OUT CIN E SR out IN V C F V V V I R I V + = APPLICATIONS INFORMATION 9 Date: 2/17/06 SP7653 Wide Input Voltage Range, 1.3MHz, Buck Regulator © Copyright 2006 Sipex Corporation APPLICATIONS INFORMATION The capacitor type suitable for the output capac- itors can also be used for the input capacitors. However, exercise extra caution when tantalum capacitorsareused.Tantalumcapacitorsareknown for catastrophic failure when exposed to surge current, and input capacitors are prone to such surge current when power supplies are connected “live” to low impedance power sources. Although tantalum capacitors have been successfully em- ployed at the input, it is generally not recom- mended. Loop Compensation Design The open loop gain of the whole system can be divided into the gain of the error amplifier, PWM modulator, buck converter output stage, and feedback resistor divider. In order to cross over at the desired frequency cut-off (FCO), the gain of the error amplifier must compensate for the attenuation caused by the rest of the loop at this frequency. The goal of loop compensation is to manipulate loop frequency response such that its crossover gain at 0db, results in a slope of -20db/dec. The first step of compensation design is to pick the loop crossover frequency. High crossover frequency is desirable for fast transient response, but often jeopardizes the power supply stability. Crossover frequency should be higher than the ESR zero but less than 1/5 of the switching frequency or 60kHz. The ESR zero is contrib- uted by the ESR associated with the output capacitors and can be determined by: ƒZ(ESR) = 1 2 COUT RESR The next step is to calculate the complex conju- gate poles contributed by the LC output filter, ƒP(LC) = 1 2 L COUT When the output capacitors are Ceramic, the SP7653 Evaluation Board requires a Type III compensation circuit to give a phase boost of 180° in order to counteract the effects of an underdamped resonance of the output filter at the double pole frequency. SP7653 Voltage Mode Control Loop with Loop Dynamic (SRz2Cz2+1)(SR1Cz3+1) (SRESRCOUT+ 1) [S^2LCOUT+S(RESR+RDC) COUT+1] VIN SR1Cz2(SRz3Cz3+1)(SRz2Cp1+1) VRAMP_PP VOUT (Volts) + _ VREF (Volts) Notes: RESR = Output Capacitor Equivalent Series Resistance. RDC = Output Inductor DC Resistance. VRAMP_PP = SP6132 Internal RAMP Amplitude Peak to Peak Voltage. Condition: Cz2 >> Cp1 & R1 >> Rz3 Output Load Resistance >> RESR & RDC R2 VREF (R1 + R2) or VOUT VFBK (Volts) Type III Voltage Loop Compensation GAMP (s) Gain Block PWM Stage GPWM Gain Block Output Stage GOUT (s) Gain Block Voltage Feedback GFBK Gain Block Definitions: RESR = Output Capacitor Equivalent Series Resistance RDC = Output Inductor DC Resistance RRAMP_PP = SP7653 internal RAMP Amplitude Peak to Peak Voltage Conditions: CZ2 >> Cp1 and R1 >> Rz3 Output Load Resistance >> RESR and RDC |
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