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SAA5290A Datasheet(PDF) 4 Page - NXP Semiconductors |
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SAA5290A Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 33 page February 1995 4 Philips Semiconductors Preliminary specification One page Economy Teletext/TV microcontroller SAA5290 PINNING SYMBOL PIN DESCRIPTION P2.0/TPWM 1 PORT 2: 8-bit open-drain bidirectional port with alternative functions. P2.0/TPWM is the output for the 14-bit high precision PWM. P2.1/PWM0 to P2.6/PWM5 are the outputs for the 6-bit PWMs 0 to 5. P2.1/PWM0 2 P2.2/PWM1 3 P2.3/PWM2 4 P2.4/PWM3 5 P2.5/PWM4 6 P2.6/PWM5 7 P2.7 8 P3.0/ADC0 9 PORT 3: 5-bit open-drain bidirectional port with alternative functions. P3.0/ADC0 to P3.2/ADC2 are the inputs for the software ADC facility. P3.1/ADC1 10 P3.2/ADC2 11 P3.3 12 P3.4 30 VSSD1 13 digital ground 1 for teletext and microcontroller circuits. P0.0 14 PORT 0: 8-bit open-drain bidirectional port. P0.5 and P0.6 have 10 mA current sinking capability at 0.5 V for direct drive of LEDs. P0.1 15 P0.2 16 P0.3 17 P0.4 18 P0.5 19 P0.6 20 P0.7 21 VSSA 22 analog ground. CVBS0 23 Composite video input. A positive-going 1 V (peak-to-peak) input is required, connected via a 100 nF capacitor. CVBS1 24 BLACK 25 Video black level storage input. This pin should be connected to VSSA via a 100 nF capacitor. IREF 26 Reference current input for analog circuits, connected to VSSA via a 27 kΩ resistor. FRAME 27 De-interlace output synchronized with the VSYNC pulse to produce a non-interlaced display by adjustment of the vertical deflection currents. VSSD2 28 Digital ground 2. COR 29 Open-drain, active LOW output which allows selective contrast reduction of the TV picture to enhance a mixed mode display. RGBREF 31 DC input voltage to define the output HIGH level on the RGB pins. B 32 Dot rate character output of the BLUE colour information. G 33 Dot rate character output of the GREEN colour information. R 34 Dot rate character output of the RED colour information. VDS 35 Video/data switch push-pull output for dot rate fast blanking. HSYNC 36 Horizontal sync dedicated input for a TTL-level version of the horizontal sync pulse. The polarity of this pulse is programmable by register bit TXT1.H POLARITY. |
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