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SAA7118E Datasheet(PDF) 5 Page - NXP Semiconductors

Part # SAA7118E
Description  Multistandard video decoder with adaptive comb filter and component video input
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SAA7118E Datasheet(HTML) 5 Page - NXP Semiconductors

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2001 May 30
5
Philips Semiconductors
Preliminary specification
Multistandard video decoder with adaptive
comb filter and component video input
SAA7118
It is a highly integrated circuit for desktop video and similar
applications. The decoder is based on the principle of
line-locked clock decoding and is able to decode the colour
of PAL, SECAM and NTSC signals into ITU 601
compatible colour component values. The SAA7118
accepts CVBS or S-video (Y/C) as analog inputs from TV
or VCR sources, including weak and distorted signals as
well as baseband component signals Y-PB-PR or RGB. An
expansion port (X-port) for digital video (bidirectional half
duplex, D1 compatible) is also supported to connect to
MPEG or video phone codec. At the so called image port
(I-port) the SAA7118 supports 8 or 16-bit wide output data
with auxiliary reference data for interfacing to VGA
controllers.
The target application for the SAA7118 is to capture and
scale video images, to be provided as digital video stream
through the image port of a VGA controller, for capture to
system memory, or just to provide digital baseband video
to any picture improvement processing.
The SAA7118 also provides a means for capturing the
serially coded data in the vertical blanking interval
(VBI-data). Two principal functions are available:
1. To capture raw video samples, after interpolation to
the required output data rate, via the scaler
2. A versatile data slicer (data recovery) unit.
The SAA7118 also incorporates field-locked audio clock
generation. This function ensures that there is always the
same number of audio samples associated with a field, or
a set of fields. This prevents the loss of synchronization
between video and audio during capture or playback.
All of the ADCs may be used to digitize a VSB signal for
subsequent decoding; a dedicated output port and a
selectable VSB clock input is provided.
The circuit is I2C-bus controlled (full write/read capability
for all programming registers, bit rate up to 400 kbits/s).
4
QUICK REFERENCE DATA
Note
1. Power dissipation is measured in component mode (four ADCs active) and 8-bit image port output mode, expansion
port is 3-stated.
5
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDD
digital supply voltage
3.0
3.3
3.6
V
VDDDC
digital core supply voltage
3.0
3.3
3.6
V
VDDA
analog supply voltage
3.1
3.3
3.5
V
Tamb
ambient temperature
0
70
°C
PA+D
analog and digital power dissipation
note 1
1.1
1.35
W
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA7118E
BGA156
plastic ball grid array package; 156 balls; body 15
× 15 × 1.15 mm
SOT472-1
SAA7118H
QFP160
plastic quad flat package; 160 leads (lead length 1.6 mm);
body 28
× 28 × 3.4 mm; high stand-off height
SOT322-2


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