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SAA7370 Datasheet(PDF) 5 Page - NXP Semiconductors |
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SAA7370 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 60 page 1998 Feb 26 5 Philips Semiconductors Product specification Digital servo processor and Compact Disc decoder (CD7) SAA7370 6 PINNING SYMBOL PIN DESCRIPTION VSSA1 1(1) analog ground 1 VDDA1 2(1) analog supply voltage 1 D1 3 unipolar current input (central diode signal input) D2 4 unipolar current input (central diode signal input) D3 5 unipolar current input (central diode signal input) VRL 6 reference voltage input for ADC D4 7 unipolar current input (central diode signal input) R1 8 unipolar current input (satellite diode signal input) R2 9 unipolar current input (satellite diode signal input) IrefT 10 current reference output for ADC calibration VRH 11 reference voltage output from ADC VSSA2 12(1) analog ground 2 SELPLL 13 selects whether internal clock multiplier PLL is used ISLICE 14 current feedback output from data slicer HFIN 15 comparator signal input VSSA3 16(1) analog ground 3 HFREF 17 comparator common mode input Iref 18 reference current output pin (nominally 0.5VDD) VDDA2 19(1) analog supply voltage 2 TEST1 20 test control input 1; this pin should be tied LOW CRIN 21 crystal/resonator input CROUT 22 crystal/resonator output TEST2 23 test control input 2; this pin should be tied LOW CL16 24 16.9344 MHz system clock output CL11 25 11.2896 or 5.6448 MHz clock output (3-state) RA 26 radial actuator output FO 27 focus actuator output SL 28 sledge control output TEST3 29 test control input 3; this pin should be tied LOW VDDD1(P) 30(1) digital supply voltage 1 for periphery DOBM 31 bi-phase mark output (externally buffered; 3-state) VSSD1 32(1) digital ground 1 MOTO1 33 motor output 1; versatile (3-state) MOTO2 34 motor output 2; versatile (3-state) SBSY 35 subcode block sync output (3-state) SFSY 36 subcode frame sync output (3-state) RCK 37 subcode clock input SUB 38 P-to-W subcode bits output (3-state) VSSD2 39(1) digital ground 2 V5 40 versatile output pin 5 |
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