SC4000 datasheet(10/52 Pages) PHILIPS

Part #	SC4000

Description	Universal Timeslot Interchange

Download	52 Pages

Scroll/Zoom	100%

Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

10 / 52 page

2000 Sep 07

10

Philips Semiconductors

Preliminary speciﬁcation

Universal Timeslot Interchange

SC4000

PIN DESCRIPTION

Pin Name

Input/Output

Pin Number

Pin Description

D_[7:0]

I/O

44,43,42,40,

39,38,36,35

(TTL Bi-directional) Microprocessor Data Bus. These bi-directional, tri-state lines allow the microprocessor to

access SC4000 internal registers as well as the source/destination routing memory and parallel access registers.

A_[8:0]

I

34,32,31,30,

28,27,26,25,24

(TTL Input) Microprocessor Address Bus. These inputs select the internal registers used by a read or write opera-

tion. Normally these inputs are connected to Microprocessor address lines A[8:0].

ALE

I

22

(TTL Input) Address Latch Enable. This input pin is tied to high in non-multiplexed mode. Otherwise, in multi-

plexed mode, the Microprocessor Address Bus is latched internally on the falling edge of this signal.

CS_1_N

I

17

(TTL Input) Chip Select 1. Reserved for future internal HDLC controller. If unused, this pin should be connected to

high.

CS_0_N

I

16

(TTL Input) Chip Select 0. This active low signal selects the SC4000

for a microprocessor read or write operation.

I_N

or

M

I

12

(TTL Input) Microprocessor Bus Interface Mode Select.

When this input is low, Intel Bus Mode (I_N) is selected.

When this input is high, Motorola Bus (M) Mode is selected.

RD_N

or

STRB_N

I

19

(TTL Input) In Intel Bus Mode (RD_N), this active low input operates with CS_0_N to configure the data bus lines

D_[7:0] as output. In Motorola Bus Mode (STRB_N), this active low input operates with CS_0_N to enable a read

or write operation.

WR_N

or

R/W_N

I

20

(TTL Input) In Intel Bus Mode (WR_N), when CS_0_N is active, the rising edge of WR_N is used to latch an inter-

nal data register with data provided via the data bus lines D_[7:0]. In Motorola Bus Mode (R/W_N), this R/W_N

input is used to distinguish between read or write during a microprocessor access.

DACK_N

I

21

(TTL Input, Pull up) DMA Acknowledge Reserved for future internal HDLC controller. If unused, this pin should be

left unconnected

RESET

I

96

(TTL Input) Reset. This active high signal initializes the microprocessor interface, configuration, routing and paral-

lel access registers.

X_IN

I

2

(CMOS Input) Crystal Clock Input. This pin is a CMOS level input of either 2.048, 4.096, 8.192, 16.384, 32.768 or

65.536 MHz. A crystal of 16.384 MHz from X_IN to X_OUT may also be used.

X_OUT

O

1

(CMOS Output) Crystal Clock Output.

REF_8K_3

or

REF_8K_OUT

I

O

7

(TTL Bi-Directional) Internal Master PLL (REF_8K_3). If configuration register bit C_43=0, this pin is a Local 8

KHz Reference 3 Input.

External Master PLL (REF_8K_OUT). If configuration register bit C_43=1, this pin is an 8 KHz Reference Output.

REF_8K_2

or

CLK_IN

I

6

(TTL Input) Internal Master PLL (REF_8K_2). If configuration register bit C_43=0, this pin is a Local 8 KHz Refer-

ence 2 Input.

External Master PLL (CLK_IN). If configuration register bit C_43=1, this is a clock input from external master PLL.

REF_8K_1

I

5

(TTL Input) Local 8 KHz Reference 1 Input.

REF_8K_0

I

4

(TTL Input) Local 8 KHz Reference 0 Input.

SI_[3:0]

I

95,94,92,91

(TTL Input, Pull Up) Local Bus Serial Input Data Streams. This pin can be programmed to 2.048, 4.096 or 8.192

Mb/s data rates.

TXD_0

I

9

(TTL Input, Pull Up) Message Channel Transmit Data. This pin is for the SCbus Message channel transmit data

input line.

TEST

I

98

(TTL Input) NAND Gate Test Mode Enable. When in test mode (TEST=1) each pin except VDD/VSS/X_OUT is

nanded with the preceding pin and output at both DRQ_R and DRQ_T pins.

INT_1

I/O

15

(TTL Bi-directional) Interrupt Request 1. Reserved for future internal HDLC controller. If unused, this pin should be

left unconnected.

INT_0

I/O

14

(TTL Bi-directional) Interrupt Request 0. This pin will be asserted (controlled by C_[55:53]) if either SCbus Error,

SCbus CLKFAIL, Frame Boundary or Internal Master PLL Error and INT_0 unmasked (C_53 = 1).

Similar Part No. - SC4000

Manufacturer	Part #	Datasheet	Description
SHENZHEN FUMAN ELECTRON...	SC4001	200Kb / 5P	PWM step-down constant current controller
List of Unclassifed Man...	SC4002A	99Kb / 1P	LCD MODULES SC4002A ( 40 CHARACTERS x 2 LINES )
Cynergy3 Co	SC4002ALM-6	85Kb / 1P	Universal Input Dual Setpoint Trip Amplifier
DB Unlimited.	SC400308-1	590Kb / 1P	Released from Engineering
DB Unlimited.	SC400408-1	691Kb / 1P	Released from Engineering

More results

Similar Description - SC4000

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	SC2000	221Kb / 44P	Universal Timeslot Interchange 2000 Sep 07
Motorola, Inc	MC145601	45Kb / 1P	Time Slot interchange circuit
Integrated Device Techn...	IDT728985	119Kb / 13P	TIME SLOT INTERCHANGE DIGITAL SWITCH
Renesas Technology Corp	IDT72V70200	503Kb / 25P	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH AUGUST 2001
Integrated Device Techn...	IDT72V90823	180Kb / 27P	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH
Renesas Technology Corp	IDT728980	240Kb / 11P	TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256 MARCH 2017
Renesas Technology Corp	IDT72V70190	463Kb / 21P	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH DECEMBER 2004
Integrated Device Techn...	IDT72V70840	132Kb / 21P	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH
Vitesse Semiconductor C...	VSC9182	110Kb / 2P	VSC9182 - 40G STS-1 Time Slot Interchange
Renesas Technology Corp	IDT72V70180	425Kb / 21P	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH MARCH 2003

More results

SC4000 Datasheet(PDF) 10 Page - NXP Semiconductors

SC4000 Datasheet(HTML) 10 Page - NXP Semiconductors

Similar Part No. - SC4000

Similar Description - SC4000

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL