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TMDS442PNP Datasheet(PDF) 11 Page - Texas Instruments |
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TMDS442PNP Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 45 page  www.ti.com TIMING CHARACTERISTICS FOR LOCAL I2C INTERFACE (LC_SCL, LC_SDA, LC_AO, LC_A1) TMDS442 SLLS757A – AUGUST 2006 – REVISED MARCH 2007 STANDARD MODE FAST MODE PARAMETER UNIT MIN MAX MIN MAX fSCL Clock frequency, SCL 100 400 kHz tw(L) Clock low period, SCL low 4.7 1.3 µs tw(H) Clock high period, SCL high 4 0.6 µs tr Rise time, SCL and SDA 1000 300 µs tf Fall time, SCL and SDA 300 300 µs tsu(1) Setup time, SDA to SCL 250 100 µs th(1) Hold time, SCL to SDA 0 0 µs t(buf) BUS Free time between a STOP and START condition 4.7 1.3 µs tsu(2) Setup time, SCL to start condition 4.7 0.6 µs th(2) Hold time, start condition to SCL 4 0.6 µs tsu(3) Setup time, SCL to stop condition 4 0.6 µs Cb(1) Capacitive load for each bus line 400 400 pF (1) Cb is the total capacitance of one bus line in pF. 11 Submit Documentation Feedback |
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