5

LT1036

1036fa

TYPICAL PERFOR A CE CHARACTERISTICS

Short-Circuit Current, 12V Output

Output Voltage Noise

Output Switching Characteristics

INPUT VOLTAGE (V)

0

0

2

5

8

16

20

LT1036M/1036C • TPC10

1

4

3

412

24

28

32

General Information

The LT1036 is a dual output regulator. The main 12V

output is capable of delivering up to 3A of load current and

can be shut down with a logic signal. The auxiliary 5V

output supplies a minimum of 75mA and is unaffected by

the logic signal. The outputs are trimmed to

± 2% initial

tolerance and exhibit excellent line and load regulation.

The logic control feature makes the LT1036 ideal for many

system applications where it is desirable to power-up a

portion of the system for a period of time, and then power

the system down during a standby operation. Applications

such as multiple power supply sequencing, elimination of

expensive AC and DC power switches, delayed start ap-

plications, switching 12V DC loads, and many others are

now easily accomplished.

Timing functions, such as delayed power-up or power-

down, can also be performed directly at the enable pin.

Because a logic low on the enable pin shuts down the main

regulator, feedback from output to enable can be used to

generate hysteresis or latching functions.

APPLICATIO S I FOR ATIO

The low quiescent current drain of the LT1036 makes it

useful in battery-powered or battery back-up applications.

The enable pin can be used as a “low battery” detector or

to shut down major portions of system power, allowing

memory portions to continue to operate from the auxiliary

output. At low output currents, the auxiliary output will

regulate with input voltage typically as low as 6.2V, giving

maximum battery life.

Good design practice with all regulators is to bypass the

input and output terminals. A 2

µF solid tantalum at the

input and at both outputs is suggested. For the applica-

tions which follow, the bypass capacitors are still recom-

mended, but for simplicity are not shown on the diagram.

It is also recommended that for maximum noise immunity

the voltage enable pin be tied high if it is unused. It can be

Output. If the enable pin is left open, it will float to a high

logic level of approximately 1.6V and the main output

regulator will be at 12V.

The enable pin is fully protected against input voltages up

to 30V, even if the power input voltage is zero.

TIME (

µs)

15

12

9

6

3

0

5

0

70

LT1036M/1036C • TPC11

10

30

50

90

60

020

40

80

SEE APPLICATION SECTION

FOR FALL TIME INFORMATION

BANDWIDTH (1 POLE) (Hz)

100

120

160

200

10k

LT1036M/1036C • TPC12

80

40

100

140

180

60

20

0

300

1k

3k

30k

MAIN (12V) OUTPUT

AUXILIARY

OUTPUT