MAX1472 Evaluation Kit

4

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Figure 1. MAX1472 EV Kit

C7

0.47

µF

JU4

*

AT 315MHz AT 433.92MHz

C1

15pF

7pF

C2

22pF

12pF

C6

15pF

10pF

L1

27nH

22nH

L3

22nH

15nH

Y1

9.84375MHz

13.56MHz

*VALUES AFFECTED BY PC BOARD LAYOUT.

50

Ω OUTPUT

VDD

VSS

R1

5k

Ω

C4

680pF

C12

220pF

L1

*

L3

*

C1

*

C2

*

RFOUT

ANTENNA_OUT

C6

*

1

2

R2

0

Ω

PA

4

3

2

XTAL1

1

8

1

2

7

6

5

XTAL2

DATA

ENABLE

MAX1472

U1

C18

OPEN

C16

OPEN

Y1

*

C14

12pF

C15

12pF

C19

OPEN

REF_IN

C5

OPEN

C11

220pF

C10

0.01

µF

R3

5.1

Ω

VDD

VDD

DATA_IN

JU3

JU2

BAT1

1

2

3

JU1

VDD

ENABLE

TRIGGER

TRIGGER

OUTPUT

VDD

R4

36k

Ω

SW1

TRIGGER

C3

0.01

µF

TRIGGER

GND

RESET

THRESHOLD

DISCHARGE

V+

CONTROL

VOLTAGE

3

2

1

4

6

7

8

5

U2

ICM7555

Figure 2. MAX1472 EV Kit Circuit Diagram