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LTC1147CN8-3.3 Datasheet(PDF) 10 Page - Linear Technology |
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LTC1147CN8-3.3 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 16 page  10 LTC1147-3.3 LTC1147-5/LTC1147L sn1147 1147fds Optimum efficiency is obtained by making the ESR equal to RSENSE. As the ESR is increased up to 2RSENSE, the efficiency degrades by less than 1%. If the ESR is greater than 2RSENSE, the voltage ripple on the output capacitor will prematurely trigger Burst Mode operation, resulting in disruption of continuous mode and an efficiency hit which can be several percent. Manufacturers such as Nichicon and United Chemicon should be considered for high performance capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR/size ratio of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirements of the application. Alumi- num electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, avail- able in case heights ranging from 2mm to 4mm. For example, if 200 µF/10V is called for in an application requiring 3mm height, two AVX 100 µF/10V (P/N TPSD 107K010) could be used. Consult the manufacturer for other specific recommendations. At low supply voltages, a minimum capacitance at COUT is needed to prevent an abnormal low frequency operating mode (see Figure 4). When COUT is made too small, the output ripple at low frequencies will be large enough to trip the voltage comparator. This causes Burst Mode opera- tion to be activated when the LTC1147 series would normally be in continuous operation. The effect is most pronounced with low values of RSENSE and can be im- proved by operating at higher frequencies with lower values of L. The output remains in regulation at all times. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in DC (resistive) load current. When a load step occurs, VOUT shifts by an amount equal to ∆ILOAD(ESR), where ESR is the effec- tive series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT until the regulator loop adapts to the current change and returns VOUT to its steady state value. During this recovery time VOUT can be monitored for overshoot or ringing which would indi- cate a stability problem. The external components shown in the Figure 1 circuit will prove adequate compensation for most applications. A second, more severe transient is caused by switching in loads with large (>1 µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in par- allel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25)CLOAD. Thus a 10µF capacitor would require a 250µs rise time, limiting the charging current to about 200mA. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: %Efficiency = 100% – (L1 + L2 + L3 + ...) Figure 4. Minimum Value of COUT (VIN – VOUT) VOLTAGE (V) 0 600 1000 4 LTC1147 • F04 400 200 0 1 2 3 5 800 L = 50 µH RSENSE = 0.02Ω L = 25 µH RSENSE = 0.02Ω L = 50 µH RSENSE = 0.05Ω APPLICATIO S I FOR ATIO |
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